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Diffstat (limited to 'src/mem/protocol/MI_example-dma.sm')
-rw-r--r--src/mem/protocol/MI_example-dma.sm5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mem/protocol/MI_example-dma.sm b/src/mem/protocol/MI_example-dma.sm
index 4ae546d64..ce7b44630 100644
--- a/src/mem/protocol/MI_example-dma.sm
+++ b/src/mem/protocol/MI_example-dma.sm
@@ -35,6 +35,7 @@ machine(DMA, "DMA Controller")
vnet_type="response";
MessageBuffer * requestToDir, network="To", virtual_network="0",
vnet_type="request";
+ MessageBuffer * mandatoryQueue;
{
state_declaration(State, desc="DMA states", default="DMA_State_READY") {
READY, AccessPermission:Invalid, desc="Ready to accept a new request";
@@ -49,14 +50,14 @@ machine(DMA, "DMA Controller")
Ack, desc="DMA write to memory completed";
}
- MessageBuffer mandatoryQueue;
State cur_state;
State getState(Addr addr) {
return cur_state;
}
+
void setState(Addr addr, State state) {
- cur_state := state;
+ cur_state := state;
}
AccessPermission getAccessPermission(Addr addr) {