diff options
Diffstat (limited to 'src/mem/protocol/MOESI_hammer-dma.sm')
| -rw-r--r-- | src/mem/protocol/MOESI_hammer-dma.sm | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/mem/protocol/MOESI_hammer-dma.sm b/src/mem/protocol/MOESI_hammer-dma.sm index 4691e2490..7157082c4 100644 --- a/src/mem/protocol/MOESI_hammer-dma.sm +++ b/src/mem/protocol/MOESI_hammer-dma.sm @@ -52,6 +52,8 @@ machine(DMA, "DMA Controller") State cur_state; + Tick clockEdge(); + State getState(Addr addr) { return cur_state; } @@ -77,7 +79,7 @@ machine(DMA, "DMA Controller") out_port(requestToDir_out, DMARequestMsg, requestToDir, desc="..."); in_port(dmaRequestQueue_in, SequencerMsg, mandatoryQueue, desc="...") { - if (dmaRequestQueue_in.isReady()) { + if (dmaRequestQueue_in.isReady(clockEdge())) { peek(dmaRequestQueue_in, SequencerMsg) { if (in_msg.Type == SequencerRequestType:LD ) { trigger(Event:ReadRequest, in_msg.LineAddress); @@ -91,7 +93,7 @@ machine(DMA, "DMA Controller") } in_port(dmaResponseQueue_in, DMAResponseMsg, responseFromDir, desc="...") { - if (dmaResponseQueue_in.isReady()) { + if (dmaResponseQueue_in.isReady(clockEdge())) { peek( dmaResponseQueue_in, DMAResponseMsg) { if (in_msg.Type == DMAResponseType:ACK) { trigger(Event:Ack, in_msg.LineAddress); @@ -147,11 +149,11 @@ machine(DMA, "DMA Controller") } action(p_popRequestQueue, "p", desc="Pop request queue") { - dmaRequestQueue_in.dequeue(); + dmaRequestQueue_in.dequeue(clockEdge()); } action(p_popResponseQueue, "\p", desc="Pop request queue") { - dmaResponseQueue_in.dequeue(); + dmaResponseQueue_in.dequeue(clockEdge()); } transition(READY, ReadRequest, BUSY_RD) { |