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-rw-r--r--src/mem/protocol/RubySlicc_Types.sm2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm
index b4601e9e6..0f6cd0b96 100644
--- a/src/mem/protocol/RubySlicc_Types.sm
+++ b/src/mem/protocol/RubySlicc_Types.sm
@@ -171,7 +171,7 @@ structure (DMASequencer, external = "yes") {
structure (TimerTable, inport="yes", external = "yes") {
bool isReady();
Address readyAddress();
- void set(Address, int);
+ void set(Address, Cycles);
void unset(Address);
bool isSet(Address);
}