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-rw-r--r--src/mem/protocol/MESI_Three_Level-L0cache.sm8
-rw-r--r--src/mem/protocol/MESI_Three_Level-L1cache.sm10
-rw-r--r--src/mem/protocol/MESI_Two_Level-L1cache.sm20
-rw-r--r--src/mem/protocol/MESI_Two_Level-L2cache.sm10
-rw-r--r--src/mem/protocol/MI_example-cache.sm2
-rw-r--r--src/mem/protocol/MOESI_CMP_directory-L1cache.sm4
-rw-r--r--src/mem/protocol/MOESI_CMP_directory-L2cache.sm22
-rw-r--r--src/mem/protocol/MOESI_CMP_token-L1cache.sm14
-rw-r--r--src/mem/protocol/MOESI_hammer-cache.sm2
9 files changed, 46 insertions, 46 deletions
diff --git a/src/mem/protocol/MESI_Three_Level-L0cache.sm b/src/mem/protocol/MESI_Three_Level-L0cache.sm
index 3f22a4906..30105727c 100644
--- a/src/mem/protocol/MESI_Three_Level-L0cache.sm
+++ b/src/mem/protocol/MESI_Three_Level-L0cache.sm
@@ -369,7 +369,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.Class := CoherenceClass:GETS;
out_msg.Sender := machineID;
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Dest);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
@@ -386,7 +386,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
DPRINTF(RubySlicc, "%s\n", machineID);
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Dest);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
@@ -402,7 +402,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.Sender := machineID;
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Dest);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
@@ -438,7 +438,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") {
if (send_evictions) {
- DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address);
+ DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address);
sequencer.evictionCallback(address);
}
}
diff --git a/src/mem/protocol/MESI_Three_Level-L1cache.sm b/src/mem/protocol/MESI_Three_Level-L1cache.sm
index 0eb9a43b5..c6b4cda64 100644
--- a/src/mem/protocol/MESI_Three_Level-L1cache.sm
+++ b/src/mem/protocol/MESI_Three_Level-L1cache.sm
@@ -392,7 +392,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, clusterID));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
@@ -409,7 +409,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
DPRINTF(RubySlicc, "%s\n", machineID);
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, clusterID));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
@@ -425,7 +425,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, clusterID));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
@@ -580,7 +580,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, clusterID));
out_msg.MessageSize := MessageSizeType:Response_Control;
- DPRINTF(RubySlicc, "%s\n", address);
+ DPRINTF(RubySlicc, "%#x\n", address);
}
}
@@ -592,7 +592,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, clusterID));
out_msg.MessageSize := MessageSizeType:Response_Control;
- DPRINTF(RubySlicc, "%s\n", address);
+ DPRINTF(RubySlicc, "%#x\n", address);
}
}
diff --git a/src/mem/protocol/MESI_Two_Level-L1cache.sm b/src/mem/protocol/MESI_Two_Level-L1cache.sm
index c40a47cae..b8a4c6220 100644
--- a/src/mem/protocol/MESI_Two_Level-L1cache.sm
+++ b/src/mem/protocol/MESI_Two_Level-L1cache.sm
@@ -528,7 +528,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -545,7 +545,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -562,7 +562,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -585,7 +585,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Prefetch := in_msg.Prefetch;
out_msg.AccessMode := in_msg.AccessMode;
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
}
}
@@ -600,7 +600,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
DPRINTF(RubySlicc, "%s\n", machineID);
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -620,7 +620,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -637,7 +637,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Requestor := machineID;
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
- DPRINTF(RubySlicc, "address: %s, destination: %s\n",
+ DPRINTF(RubySlicc, "address: %#x, destination: %s\n",
address, out_msg.Destination);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.Prefetch := in_msg.Prefetch;
@@ -759,7 +759,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") {
if (send_evictions) {
- DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address);
+ DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address);
sequencer.evictionCallback(address);
}
}
@@ -790,7 +790,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
out_msg.MessageSize := MessageSizeType:Response_Control;
- DPRINTF(RubySlicc, "%s\n", address);
+ DPRINTF(RubySlicc, "%#x\n", address);
}
}
@@ -802,7 +802,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache,
l2_select_low_bit, l2_select_num_bits, intToID(0)));
out_msg.MessageSize := MessageSizeType:Response_Control;
- DPRINTF(RubySlicc, "%s\n", address);
+ DPRINTF(RubySlicc, "%#x\n", address);
}
}
diff --git a/src/mem/protocol/MESI_Two_Level-L2cache.sm b/src/mem/protocol/MESI_Two_Level-L2cache.sm
index 4134b7964..0fd9028c6 100644
--- a/src/mem/protocol/MESI_Two_Level-L2cache.sm
+++ b/src/mem/protocol/MESI_Two_Level-L2cache.sm
@@ -174,7 +174,7 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
void addSharer(Addr addr, MachineID requestor, Entry cache_entry) {
assert(is_valid(cache_entry));
- DPRINTF(RubySlicc, "machineID: %s, requestor: %s, address: %s\n",
+ DPRINTF(RubySlicc, "machineID: %s, requestor: %s, address: %#x\n",
machineID, requestor, addr);
cache_entry.Sharers.add(requestor);
}
@@ -267,7 +267,7 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
return Event:L1_PUTX_old;
}
} else {
- DPRINTF(RubySlicc, "address: %s, Request Type: %s\n", addr, type);
+ DPRINTF(RubySlicc, "address: %#x, Request Type: %s\n", addr, type);
error("Invalid L1 forwarded request type");
}
}
@@ -293,7 +293,7 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
peek(L1unblockNetwork_in, ResponseMsg) {
Entry cache_entry := getCacheEntry(in_msg.addr);
TBE tbe := TBEs[in_msg.addr];
- DPRINTF(RubySlicc, "Addr: %s State: %s Sender: %s Type: %s Dest: %s\n",
+ DPRINTF(RubySlicc, "Addr: %#x State: %s Sender: %s Type: %s Dest: %s\n",
in_msg.addr, getState(tbe, cache_entry, in_msg.addr),
in_msg.Sender, in_msg.Type, in_msg.Destination);
@@ -357,7 +357,7 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
Entry cache_entry := getCacheEntry(in_msg.addr);
TBE tbe := TBEs[in_msg.addr];
- DPRINTF(RubySlicc, "Addr: %s State: %s Req: %s Type: %s Dest: %s\n",
+ DPRINTF(RubySlicc, "Addr: %#x State: %s Req: %s Type: %s Dest: %s\n",
in_msg.addr, getState(tbe, cache_entry, in_msg.addr),
in_msg.Requestor, in_msg.Type, in_msg.Destination);
@@ -546,7 +546,7 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
out_msg.Destination.add(tbe.L1_GetX_ID);
DPRINTF(RubySlicc, "%s\n", out_msg.Destination);
out_msg.DataBlk := cache_entry.DataBlk;
- DPRINTF(RubySlicc, "Address: %s, Destination: %s, DataBlock: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Destination: %s, DataBlock: %s\n",
out_msg.addr, out_msg.Destination, out_msg.DataBlk);
out_msg.MessageSize := MessageSizeType:Response_Data;
}
diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm
index 0a1570494..1a83704e2 100644
--- a/src/mem/protocol/MI_example-cache.sm
+++ b/src/mem/protocol/MI_example-cache.sm
@@ -396,7 +396,7 @@ machine(L1Cache, "MI Example L1 Cache")
action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") {
if (send_evictions) {
- DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address);
+ DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address);
sequencer.evictionCallback(address);
}
}
diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
index 1b1fd4ac7..1327471fc 100644
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
@@ -514,7 +514,7 @@ machine(L1Cache, "Directory protocol")
out_msg.Acks := in_msg.Acks;
out_msg.MessageSize := MessageSizeType:Response_Data;
}
- DPRINTF(RubySlicc, "Sending data to L2: %s\n", in_msg.addr);
+ DPRINTF(RubySlicc, "Sending data to L2: %#x\n", in_msg.addr);
}
else {
enqueue(responseNetwork_out, ResponseMsg, request_latency) {
@@ -889,7 +889,7 @@ machine(L1Cache, "Directory protocol")
action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") {
if (send_evictions) {
- DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address);
+ DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address);
sequencer.evictionCallback(address);
}
}
diff --git a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
index 84fb276e3..07cfe18d3 100644
--- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
@@ -797,7 +797,7 @@ machine(L2Cache, "Token protocol")
out_msg.Dirty := false;
out_msg.MessageSize := MessageSizeType:Response_Data;
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, tbe.DataBlk);
}
@@ -814,7 +814,7 @@ machine(L2Cache, "Token protocol")
out_msg.Acks := tbe.Local_GETX_IntAcks;
out_msg.MessageSize := MessageSizeType:Response_Data;
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, tbe.DataBlk);
}
@@ -864,7 +864,7 @@ machine(L2Cache, "Token protocol")
out_msg.MessageSize := MessageSizeType:Response_Data;
}
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, tbe.DataBlk);
}
@@ -883,7 +883,7 @@ machine(L2Cache, "Token protocol")
out_msg.Acks := tbe.Fwd_GETX_ExtAcks;
out_msg.MessageSize := MessageSizeType:Response_Data;
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, tbe.DataBlk);
}
@@ -900,7 +900,7 @@ machine(L2Cache, "Token protocol")
out_msg.Acks := tbe.Fwd_GETX_ExtAcks;
out_msg.MessageSize := MessageSizeType:Response_Data;
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, tbe.DataBlk);
}
@@ -920,7 +920,7 @@ machine(L2Cache, "Token protocol")
out_msg.MessageSize := MessageSizeType:ResponseL2hit_Data;
}
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
}
@@ -940,7 +940,7 @@ machine(L2Cache, "Token protocol")
out_msg.Acks := tbe.Local_GETX_IntAcks;
}
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
}
@@ -959,7 +959,7 @@ machine(L2Cache, "Token protocol")
out_msg.Acks := in_msg.Acks;
}
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
}
@@ -980,7 +980,7 @@ machine(L2Cache, "Token protocol")
out_msg.MessageSize := MessageSizeType:Response_Data;
}
}
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
}
@@ -1044,7 +1044,7 @@ machine(L2Cache, "Token protocol")
action(ee_sendLocalInv, "\ee", desc="Send local invalidates") {
assert(is_valid(tbe));
tbe.NumIntPendingAcks := countLocalSharers(cache_entry, address);
- DPRINTF(RubySlicc, "Address: %s, Local Sharers: %s, Pending Acks: %d\n",
+ DPRINTF(RubySlicc, "Address: %#x, Local Sharers: %s, Pending Acks: %d\n",
address, getLocalSharers(cache_entry, address),
tbe.NumIntPendingAcks);
if (isLocalOwnerValid(cache_entry, address)) {
@@ -1494,7 +1494,7 @@ machine(L2Cache, "Token protocol")
peek(responseNetwork_in, ResponseMsg) {
assert(is_valid(cache_entry));
cache_entry.DataBlk := in_msg.DataBlk;
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
if ((cache_entry.Dirty == false) && in_msg.Dirty) {
cache_entry.Dirty := in_msg.Dirty;
diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
index dac2027b9..b8c2da761 100644
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
@@ -1294,7 +1294,7 @@ machine(L1Cache, "Token protocol")
action(h_load_hit, "hd", desc="Notify sequencer the load completed.") {
assert(is_valid(cache_entry));
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
L1Dcache.setMRU(cache_entry);
@@ -1304,7 +1304,7 @@ machine(L1Cache, "Token protocol")
action(h_ifetch_hit, "hi", desc="Notify sequencer the load completed.") {
assert(is_valid(cache_entry));
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
L1Icache.setMRU(cache_entry);
@@ -1314,7 +1314,7 @@ machine(L1Cache, "Token protocol")
action(x_external_load_hit, "x", desc="Notify sequencer the load completed.") {
assert(is_valid(cache_entry));
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
peek(responseNetwork_in, ResponseMsg) {
L1Icache.setMRU(address);
@@ -1327,7 +1327,7 @@ machine(L1Cache, "Token protocol")
action(hh_store_hit, "\h", desc="Notify sequencer that store completed.") {
assert(is_valid(cache_entry));
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
L1Dcache.setMRU(cache_entry);
@@ -1339,7 +1339,7 @@ machine(L1Cache, "Token protocol")
action(xx_external_store_hit, "\x", desc="Notify sequencer that store completed.") {
assert(is_valid(cache_entry));
- DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
+ DPRINTF(RubySlicc, "Address: %#x, Data Block: %s\n",
address, cache_entry.DataBlk);
peek(responseNetwork_in, ResponseMsg) {
L1Icache.setMRU(address);
@@ -1424,7 +1424,7 @@ machine(L1Cache, "Token protocol")
peek(responseNetwork_in, ResponseMsg) {
assert(is_valid(cache_entry));
assert(in_msg.Tokens != 0);
- DPRINTF(RubySlicc, "L1 received tokens for address: %s, tokens: %d\n",
+ DPRINTF(RubySlicc, "L1 received tokens for address: %#x, tokens: %d\n",
in_msg.addr, in_msg.Tokens);
cache_entry.Tokens := cache_entry.Tokens + in_msg.Tokens;
DPRINTF(RubySlicc, "%d\n", cache_entry.Tokens);
@@ -1544,7 +1544,7 @@ machine(L1Cache, "Token protocol")
action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") {
if (send_evictions) {
- DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address);
+ DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address);
sequencer.evictionCallback(address);
}
}
diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm
index cfb2526a5..f5a1d28c3 100644
--- a/src/mem/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/protocol/MOESI_hammer-cache.sm
@@ -1258,7 +1258,7 @@ machine({L1Cache, L2Cache}, "AMD Hammer-like protocol")
action(forward_eviction_to_cpu, "\cc", desc="sends eviction information to the processor") {
if (send_evictions) {
- DPRINTF(RubySlicc, "Sending invalidation for %s to the CPU\n", address);
+ DPRINTF(RubySlicc, "Sending invalidation for %#x to the CPU\n", address);
sequencer.evictionCallback(address);
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-28 02:41:34 +0000