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-rw-r--r--src/mem/protocol/MOESI_hammer-cache.sm2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm
index 6fb5091af..3b2240800 100644
--- a/src/mem/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/protocol/MOESI_hammer-cache.sm
@@ -143,7 +143,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
TBETable TBEs, template_hack="<L1Cache_TBE>";
CacheMemory L1IcacheMemory, factory='RubySystem::getCache(m_cfg["icache"])';
CacheMemory L1DcacheMemory, factory='RubySystem::getCache(m_cfg["dcache"])';
- CacheMemory L2cacheMemory, factory='RubySystem::getCache(m_cfg["cache"])';
+ CacheMemory L2cacheMemory, factory='RubySystem::getCache(m_cfg["l2cache"])';
Entry getCacheEntry(Address addr), return_by_ref="yes" {
if (L2cacheMemory.isTagPresent(addr)) {