diff options
Diffstat (limited to 'src/mem/protocol')
| -rw-r--r-- | src/mem/protocol/MI_example-dir.sm | 59 |
1 files changed, 9 insertions, 50 deletions
diff --git a/src/mem/protocol/MI_example-dir.sm b/src/mem/protocol/MI_example-dir.sm index c764634ec..9af1940f7 100644 --- a/src/mem/protocol/MI_example-dir.sm +++ b/src/mem/protocol/MI_example-dir.sm @@ -1,6 +1,8 @@ machine(Directory, "Directory protocol") -: int directory_latency +: int directory_latency, + int dma_select_low_bit, + int dma_select_num_bits { MessageBuffer forwardFromDir, network="To", virtual_network="2", ordered="false"; @@ -220,26 +222,6 @@ machine(Directory, "Directory protocol") directory[address].Owner.clear(); } -// action(d_sendData, "d", desc="Send data to requestor") { -// peek(requestQueue_in, RequestMsg) { -// enqueue(responseNetwork_out, ResponseMsg, latency="MEMORY_LATENCY") { -// out_msg.Address := address; -// -// if (in_msg.Type == CoherenceRequestType:GETS && directory[address].Sharers.count() == 0) { -// // out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE_CLEAN; -// out_msg.Type := CoherenceResponseType:DATA; -// } else { -// out_msg.Type := CoherenceResponseType:DATA; -// } -// -// out_msg.Sender := machineID; -// out_msg.Destination.add(in_msg.Requestor); -// out_msg.DataBlk := directory[in_msg.Address].DataBlk; -// out_msg.MessageSize := MessageSizeType:Response_Data; -// } -// } -// } - action(d_sendData, "d", desc="Send data to requestor") { peek(memQueue_in, MemoryMsg) { enqueue(responseNetwork_out, ResponseMsg, latency="1") { @@ -253,18 +235,6 @@ machine(Directory, "Directory protocol") } } -// action(dr_sendDMAData, "dr", desc="Send Data to DMA controller from directory") { -// peek(dmaRequestQueue_in, DMARequestMsg) { -// enqueue(dmaResponseNetwork_out, DMAResponseMsg, latency="MEMORY_LATENCY") { -// out_msg.PhysicalAddress := address; -// out_msg.Type := DMAResponseType:DATA; -// out_msg.DataBlk := directory[in_msg.PhysicalAddress].DataBlk; // we send the entire data block and rely on the dma controller to split it up if need be -// out_msg.Destination.add(map_Address_to_DMA(address)); -// out_msg.MessageSize := MessageSizeType:Response_Data; -// } -// } -// } - action(dr_sendDMAData, "dr", desc="Send Data to DMA controller from directory") { peek(memQueue_in, MemoryMsg) { enqueue(dmaResponseNetwork_out, DMAResponseMsg, latency="1") { @@ -272,7 +242,8 @@ machine(Directory, "Directory protocol") out_msg.LineAddress := address; out_msg.Type := DMAResponseType:DATA; out_msg.DataBlk := in_msg.DataBlk; // we send the entire data block and rely on the dma controller to split it up if need be - out_msg.Destination.add(map_Address_to_DMA(address)); + out_msg.Destination.add(mapAddressToRange(address, MachineType:DMA, + dma_select_low_bit, dma_select_num_bits)); out_msg.MessageSize := MessageSizeType:Response_Data; } } @@ -287,7 +258,8 @@ machine(Directory, "Directory protocol") out_msg.LineAddress := address; out_msg.Type := DMAResponseType:DATA; out_msg.DataBlk := in_msg.DataBlk; // we send the entire data block and rely on the dma controller to split it up if need be - out_msg.Destination.add(map_Address_to_DMA(address)); + out_msg.Destination.add(mapAddressToRange(address, MachineType:DMA, + dma_select_low_bit, dma_select_num_bits)); out_msg.MessageSize := MessageSizeType:Response_Data; } } @@ -298,7 +270,8 @@ machine(Directory, "Directory protocol") out_msg.PhysicalAddress := address; out_msg.LineAddress := address; out_msg.Type := DMAResponseType:ACK; - out_msg.Destination.add(map_Address_to_DMA(address)); + out_msg.Destination.add(mapAddressToRange(address, MachineType:DMA, + dma_select_low_bit, dma_select_num_bits)); out_msg.MessageSize := MessageSizeType:Writeback_Control; } } @@ -416,20 +389,6 @@ machine(Directory, "Directory protocol") } } } -// action(qw_queueMemoryWBRequest, "qw", desc="Queue off-chip writeback request") { -// peek(dmaRequestQueue_in, DMARequestMsg) { -// enqueue(memQueue_out, MemoryMsg, latency="1") { -// out_msg.Address := address; -// out_msg.Type := MemoryRequestType:MEMORY_WB; -// out_msg.OriginalRequestorMachId := machineID; -// out_msg.DataBlk := in_msg.DataBlk; -// out_msg.MessageSize := in_msg.MessageSize; - -// DEBUG_EXPR(out_msg); -// } -// } -// } - action(qw_queueMemoryWBRequest_partial, "qwp", desc="Queue off-chip writeback request") { peek(dmaRequestQueue_in, DMARequestMsg) { |