diff options
Diffstat (limited to 'src/mem/ruby/network/garnet/fixed-pipeline')
9 files changed, 15 insertions, 15 deletions
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py index bbd785e2c..14c3f543c 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py +++ b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py @@ -37,7 +37,7 @@ class NetworkLink_d(ClockedObject): type = 'NetworkLink_d' cxx_header = "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh" link_id = Param.Int(Parent.link_id, "link id") - link_latency = Param.Int(Parent.latency, "link latency") + link_latency = Param.Cycles(Parent.latency, "link latency") vcs_per_vnet = Param.Int(Parent.vcs_per_vnet, "virtual channels per virtual network") virt_nets = Param.Int(Parent.number_of_virtual_networks, diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh b/src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh index 3ebf7c6e9..07c6bec3a 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh +++ b/src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh @@ -90,7 +90,7 @@ class InputUnit_d : public Consumer { flit_d *t_flit = new flit_d(in_vc, free_signal, curTime); creditQueue->insert(t_flit); - m_credit_link->scheduleEvent(1); + m_credit_link->scheduleEvent(Cycles(1)); } inline int diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc index f0e117aad..c58b38c52 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc +++ b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc @@ -244,14 +244,14 @@ NetworkInterface_d::wakeup() free_signal = true; outNode_ptr[t_flit->get_vnet()]->enqueue( - t_flit->get_msg_ptr(), 1); + t_flit->get_msg_ptr(), Cycles(1)); } // Simply send a credit back since we are not buffering // this flit in the NI flit_d *credit_flit = new flit_d(t_flit->get_vc(), free_signal, m_net_ptr->curCycle()); creditQueue->insert(credit_flit); - m_ni_credit_link->scheduleEvent(1); + m_ni_credit_link->scheduleEvent(Cycles(1)); int vnet = t_flit->get_vnet(); m_net_ptr->increment_received_flits(vnet); @@ -324,7 +324,7 @@ NetworkInterface_d::scheduleOutputLink() t_flit->set_time(m_net_ptr->curCycle() + 1); outSrcQueue->insert(t_flit); // schedule the out link - outNetLink->scheduleEvent(1); + outNetLink->scheduleEvent(Cycles(1)); if (t_flit->get_type() == TAIL_ || t_flit->get_type() == HEAD_TAIL_) { @@ -351,13 +351,13 @@ NetworkInterface_d::checkReschedule() { for (int vnet = 0; vnet < m_virtual_networks; vnet++) { if (inNode_ptr[vnet]->isReady()) { // Is there a message waiting - scheduleEvent(1); + scheduleEvent(Cycles(1)); return; } } for (int vc = 0; vc < m_num_vcs; vc++) { if (m_ni_buffers[vc]->isReadyForNext(m_net_ptr->curCycle())) { - scheduleEvent(1); + scheduleEvent(Cycles(1)); return; } } diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh index c52c903e0..14f6a6527 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh +++ b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh @@ -72,7 +72,7 @@ class NetworkLink_d : public ClockedObject, public Consumer protected: int m_id; - int m_latency; + Cycles m_latency; int channel_width; GarnetNetwork_d *m_net_ptr; diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh b/src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh index 4fa7dcb90..4b5b851e2 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh +++ b/src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh @@ -84,7 +84,7 @@ class OutputUnit_d : public Consumer insert_flit(flit_d *t_flit) { m_out_buffer->insert(t_flit); - m_out_link->scheduleEvent(1); + m_out_link->scheduleEvent(Cycles(1)); } private: diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc index 2a759eb87..eaa147c41 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc +++ b/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc @@ -135,13 +135,13 @@ Router_d::route_req(flit_d *t_flit, InputUnit_d *in_unit, int invc) void Router_d::vcarb_req() { - m_vc_alloc->scheduleEvent(1); + m_vc_alloc->scheduleEvent(Cycles(1)); } void Router_d::swarb_req() { - m_sw_alloc->scheduleEvent(1); + m_sw_alloc->scheduleEvent(Cycles(1)); } void @@ -154,7 +154,7 @@ void Router_d::update_sw_winner(int inport, flit_d *t_flit) { m_switch->update_sw_winner(inport, t_flit); - m_switch->scheduleEvent(1); + m_switch->scheduleEvent(Cycles(1)); } void diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc index ab3f4b761..49f2e8c57 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc +++ b/src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc @@ -220,7 +220,7 @@ SWallocator_d::check_for_wakeup() for (int j = 0; j < m_num_vcs; j++) { if (m_input_unit[i]->need_stage_nextcycle(j, ACTIVE_, SA_, m_router->curCycle())) { - scheduleEvent(1); + scheduleEvent(Cycles(1)); return; } } diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc index db7446f7a..0b2c3a227 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc +++ b/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc @@ -90,7 +90,7 @@ Switch_d::check_for_wakeup() { for (int inport = 0; inport < m_num_inports; inport++) { if (m_switch_buffer[inport]->isReadyForNext(m_router->curCycle())) { - scheduleEvent(1); + scheduleEvent(Cycles(1)); break; } } diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc index 012837362..9569810e8 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc +++ b/src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc @@ -260,7 +260,7 @@ VCallocator_d::check_for_wakeup() for (int j = 0; j < m_num_vcs; j++) { if (m_input_unit[i]->need_stage_nextcycle(j, VC_AB_, VA_, m_router->curCycle())) { - scheduleEvent(1); + scheduleEvent(Cycles(1)); return; } } |