diff options
Diffstat (limited to 'src/mem/ruby/network/simple')
-rw-r--r-- | src/mem/ruby/network/simple/PerfectSwitch.cc | 26 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/PerfectSwitch.hh | 14 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/SimpleNetwork.cc | 36 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/SimpleNetwork.hh | 20 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Switch.cc | 35 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Switch.hh | 12 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Throttle.cc | 14 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Throttle.hh | 16 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Topology.cc | 36 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Topology.hh | 21 |
10 files changed, 121 insertions, 109 deletions
diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc index 8e6114ba9..5a1ee32ec 100644 --- a/src/mem/ruby/network/simple/PerfectSwitch.cc +++ b/src/mem/ruby/network/simple/PerfectSwitch.cc @@ -26,6 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include <algorithm> + #include "mem/protocol/Protocol.hh" #include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/network/simple/PerfectSwitch.hh" @@ -55,11 +57,11 @@ PerfectSwitch::PerfectSwitch(SwitchID sid, SimpleNetwork* network_ptr) } void -PerfectSwitch::addInPort(const Vector<MessageBuffer*>& in) +PerfectSwitch::addInPort(const vector<MessageBuffer*>& in) { assert(in.size() == m_virtual_networks); NodeID port = m_in.size(); - m_in.insertAtBottom(in); + m_in.push_back(in); for (int j = 0; j < m_virtual_networks; j++) { m_in[port][j]->setConsumer(this); string desc = csprintf("[Queue from port %s %s %s to PerfectSwitch]", @@ -70,7 +72,7 @@ PerfectSwitch::addInPort(const Vector<MessageBuffer*>& in) } void -PerfectSwitch::addOutPort(const Vector<MessageBuffer*>& out, +PerfectSwitch::addOutPort(const vector<MessageBuffer*>& out, const NetDest& routing_table_entry) { assert(out.size() == m_virtual_networks); @@ -79,11 +81,11 @@ PerfectSwitch::addOutPort(const Vector<MessageBuffer*>& out, LinkOrder l; l.m_value = 0; l.m_link = m_out.size(); - m_link_order.insertAtBottom(l); + m_link_order.push_back(l); // Add to routing table - m_out.insertAtBottom(out); - m_routing_table.insertAtBottom(routing_table_entry); + m_out.push_back(out); + m_routing_table.push_back(routing_table_entry); } void @@ -111,7 +113,7 @@ PerfectSwitch::clearBuffers() void PerfectSwitch::reconfigureOutPort(const NetDest& routing_table_entry) { - m_routing_table.insertAtBottom(routing_table_entry); + m_routing_table.push_back(routing_table_entry); } PerfectSwitch::~PerfectSwitch() @@ -161,8 +163,8 @@ PerfectSwitch::wakeup() } // temporary vectors to store the routing results - Vector<LinkID> output_links; - Vector<NetDest> output_link_destinations; + vector<LinkID> output_links; + vector<NetDest> output_link_destinations; // Is there a message waiting? while (m_in[incoming][vnet]->isReady()) { @@ -206,7 +208,7 @@ PerfectSwitch::wakeup() } // Look at the most empty link first - m_link_order.sortVector(); + sort(m_link_order.begin(), m_link_order.end()); } } @@ -220,14 +222,14 @@ PerfectSwitch::wakeup() continue; // Remember what link we're using - output_links.insertAtBottom(link); + output_links.push_back(link); // Need to remember which destinations need this // message in another vector. This Set is the // intersection of the routing_table entry and the // current destination set. The intersection must // not be empty, since we are inside "if" - output_link_destinations.insertAtBottom(msg_dsts.AND(dst)); + output_link_destinations.push_back(msg_dsts.AND(dst)); // Next, we update the msg_destination not to // include those nodes that were already handled diff --git a/src/mem/ruby/network/simple/PerfectSwitch.hh b/src/mem/ruby/network/simple/PerfectSwitch.hh index 68bf0df9c..a7e577df0 100644 --- a/src/mem/ruby/network/simple/PerfectSwitch.hh +++ b/src/mem/ruby/network/simple/PerfectSwitch.hh @@ -37,8 +37,8 @@ #define __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__ #include <iostream> +#include <vector> -#include "mem/gems_common/Vector.hh" #include "mem/ruby/common/Consumer.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/system/NodeID.hh" @@ -59,8 +59,8 @@ class PerfectSwitch : public Consumer PerfectSwitch(SwitchID sid, SimpleNetwork* network_ptr); ~PerfectSwitch(); - void addInPort(const Vector<MessageBuffer*>& in); - void addOutPort(const Vector<MessageBuffer*>& out, + void addInPort(const std::vector<MessageBuffer*>& in); + void addOutPort(const std::vector<MessageBuffer*>& out, const NetDest& routing_table_entry); void clearRoutingTables(); void clearBuffers(); @@ -84,10 +84,10 @@ class PerfectSwitch : public Consumer SwitchID m_switch_id; // vector of queues from the components - Vector<Vector<MessageBuffer*> > m_in; - Vector<Vector<MessageBuffer*> > m_out; - Vector<NetDest> m_routing_table; - Vector<LinkOrder> m_link_order; + std::vector<std::vector<MessageBuffer*> > m_in; + std::vector<std::vector<MessageBuffer*> > m_out; + std::vector<NetDest> m_routing_table; + std::vector<LinkOrder> m_link_order; int m_virtual_networks; int m_round_robin_start; int m_wakeups_wo_switch; diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc index 47404ad01..cb32ed9e1 100644 --- a/src/mem/ruby/network/simple/SimpleNetwork.cc +++ b/src/mem/ruby/network/simple/SimpleNetwork.cc @@ -26,6 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include "base/stl_helpers.hh" #include "mem/gems_common/Map.hh" #include "mem/protocol/MachineType.hh" #include "mem/protocol/Protocol.hh" @@ -39,6 +40,7 @@ #include "mem/ruby/system/System.hh" using namespace std; +using m5::stl_helpers::deletePointers; #if 0 // ***BIG HACK*** - This is actually code that _should_ be in Network.cc @@ -59,21 +61,21 @@ SimpleNetwork::SimpleNetwork(const Params *p) // SimpleNetwork child constructor. Therefore, the member variables // used below should already be initialized. - m_endpoint_switches.setSize(m_nodes); + m_endpoint_switches.resize(m_nodes); - m_in_use.setSize(m_virtual_networks); - m_ordered.setSize(m_virtual_networks); + m_in_use.resize(m_virtual_networks); + m_ordered.resize(m_virtual_networks); for (int i = 0; i < m_virtual_networks; i++) { m_in_use[i] = false; m_ordered[i] = false; } // Allocate to and from queues - m_toNetQueues.setSize(m_nodes); - m_fromNetQueues.setSize(m_nodes); + m_toNetQueues.resize(m_nodes); + m_fromNetQueues.resize(m_nodes); for (int node = 0; node < m_nodes; node++) { - m_toNetQueues[node].setSize(m_virtual_networks); - m_fromNetQueues[node].setSize(m_virtual_networks); + m_toNetQueues[node].resize(m_virtual_networks); + m_fromNetQueues[node].resize(m_virtual_networks); for (int j = 0; j < m_virtual_networks; j++) { m_toNetQueues[node][j] = new MessageBuffer(csprintf("toNet node %d j %d", node, j)); @@ -93,7 +95,7 @@ SimpleNetwork::init() assert(m_topology_ptr != NULL); int number_of_switches = m_topology_ptr->numSwitches(); for (int i = 0; i < number_of_switches; i++) { - m_switch_ptr_vector.insertAtBottom(new Switch(i, this)); + m_switch_ptr_vector.push_back(new Switch(i, this)); } // false because this isn't a reconfiguration @@ -118,11 +120,11 @@ SimpleNetwork::reset() SimpleNetwork::~SimpleNetwork() { for (int i = 0; i < m_nodes; i++) { - m_toNetQueues[i].deletePointers(); - m_fromNetQueues[i].deletePointers(); + deletePointers(m_toNetQueues[i]); + deletePointers(m_fromNetQueues[i]); } - m_switch_ptr_vector.deletePointers(); - m_buffers_to_free.deletePointers(); + deletePointers(m_switch_ptr_vector); + deletePointers(m_buffers_to_free); // delete m_topology_ptr; } @@ -173,17 +175,17 @@ SimpleNetwork::makeInternalLink(SwitchID src, SwitchID dest, } // Create a set of new MessageBuffers - Vector<MessageBuffer*> queues; + std::vector<MessageBuffer*> queues; for (int i = 0; i < m_virtual_networks; i++) { // allocate a buffer MessageBuffer* buffer_ptr = new MessageBuffer; buffer_ptr->setOrdering(true); if (m_buffer_size > 0) { - buffer_ptr->setSize(m_buffer_size); + buffer_ptr->resize(m_buffer_size); } - queues.insertAtBottom(buffer_ptr); + queues.push_back(buffer_ptr); // remember to deallocate it - m_buffers_to_free.insertAtBottom(buffer_ptr); + m_buffers_to_free.push_back(buffer_ptr); } // Connect it to the two switches m_switch_ptr_vector[dest]->addInPort(queues); @@ -217,7 +219,7 @@ SimpleNetwork::getFromNetQueue(NodeID id, bool ordered, int network_num) return m_fromNetQueues[id][network_num]; } -const Vector<Throttle*>* +const std::vector<Throttle*>* SimpleNetwork::getThrottles(NodeID id) const { assert(id >= 0); diff --git a/src/mem/ruby/network/simple/SimpleNetwork.hh b/src/mem/ruby/network/simple/SimpleNetwork.hh index f9cb22a6a..6767f725b 100644 --- a/src/mem/ruby/network/simple/SimpleNetwork.hh +++ b/src/mem/ruby/network/simple/SimpleNetwork.hh @@ -64,8 +64,8 @@ #define __MEM_RUBY_NETWORK_SIMPLE_SIMPLENETWORK_HH__ #include <iostream> +#include <vector> -#include "mem/gems_common/Vector.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/network/Network.hh" #include "mem/ruby/system/NodeID.hh" @@ -96,7 +96,7 @@ class SimpleNetwork : public Network // returns the queue requested for the given component MessageBuffer* getToNetQueue(NodeID id, bool ordered, int network_num); MessageBuffer* getFromNetQueue(NodeID id, bool ordered, int network_num); - virtual const Vector<Throttle*>* getThrottles(NodeID id) const; + virtual const std::vector<Throttle*>* getThrottles(NodeID id) const; bool isVNetOrdered(int vnet) { return m_ordered[vnet]; } bool validVirtualNetwork(int vnet) { return m_in_use[vnet]; } @@ -130,14 +130,14 @@ class SimpleNetwork : public Network SimpleNetwork& operator=(const SimpleNetwork& obj); // vector of queues from the components - Vector<Vector<MessageBuffer*> > m_toNetQueues; - Vector<Vector<MessageBuffer*> > m_fromNetQueues; - - Vector<bool> m_in_use; - Vector<bool> m_ordered; - Vector<Switch*> m_switch_ptr_vector; - Vector<MessageBuffer*> m_buffers_to_free; - Vector<Switch*> m_endpoint_switches; + std::vector<std::vector<MessageBuffer*> > m_toNetQueues; + std::vector<std::vector<MessageBuffer*> > m_fromNetQueues; + + std::vector<bool> m_in_use; + std::vector<bool> m_ordered; + std::vector<Switch*> m_switch_ptr_vector; + std::vector<MessageBuffer*> m_buffers_to_free; + std::vector<Switch*> m_endpoint_switches; }; inline std::ostream& diff --git a/src/mem/ruby/network/simple/Switch.cc b/src/mem/ruby/network/simple/Switch.cc index e88a24505..3439bf44b 100644 --- a/src/mem/ruby/network/simple/Switch.cc +++ b/src/mem/ruby/network/simple/Switch.cc @@ -26,6 +26,9 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include <numeric> + +#include "base/stl_helpers.hh" #include "mem/protocol/MessageSizeType.hh" #include "mem/protocol/Protocol.hh" #include "mem/ruby/buffers/MessageBuffer.hh" @@ -35,12 +38,13 @@ #include "mem/ruby/network/simple/Throttle.hh" using namespace std; +using m5::stl_helpers::deletePointers; +using m5::stl_helpers::operator<<; Switch::Switch(SwitchID sid, SimpleNetwork* network_ptr) { m_perfect_switch_ptr = new PerfectSwitch(sid, network_ptr); m_switch_id = sid; - m_throttles.setSize(0); } Switch::~Switch() @@ -48,20 +52,20 @@ Switch::~Switch() delete m_perfect_switch_ptr; // Delete throttles (one per output port) - m_throttles.deletePointers(); + deletePointers(m_throttles); // Delete MessageBuffers - m_buffers_to_free.deletePointers(); + deletePointers(m_buffers_to_free); } void -Switch::addInPort(const Vector<MessageBuffer*>& in) +Switch::addInPort(const vector<MessageBuffer*>& in) { m_perfect_switch_ptr->addInPort(in); } void -Switch::addOutPort(const Vector<MessageBuffer*>& out, +Switch::addOutPort(const vector<MessageBuffer*>& out, const NetDest& routing_table_entry, int link_latency, int bw_multiplier) { Throttle* throttle_ptr = NULL; @@ -69,20 +73,20 @@ Switch::addOutPort(const Vector<MessageBuffer*>& out, // Create a throttle throttle_ptr = new Throttle(m_switch_id, m_throttles.size(), link_latency, bw_multiplier); - m_throttles.insertAtBottom(throttle_ptr); + m_throttles.push_back(throttle_ptr); // Create one buffer per vnet (these are intermediaryQueues) - Vector<MessageBuffer*> intermediateBuffers; + vector<MessageBuffer*> intermediateBuffers; for (int i = 0; i < out.size(); i++) { MessageBuffer* buffer_ptr = new MessageBuffer; // Make these queues ordered buffer_ptr->setOrdering(true); Network* net_ptr = RubySystem::getNetwork(); if (net_ptr->getBufferSize() > 0) { - buffer_ptr->setSize(net_ptr->getBufferSize()); + buffer_ptr->resize(net_ptr->getBufferSize()); } - intermediateBuffers.insertAtBottom(buffer_ptr); - m_buffers_to_free.insertAtBottom(buffer_ptr); + intermediateBuffers.push_back(buffer_ptr); + m_buffers_to_free.push_back(buffer_ptr); } // Hook the queues to the PerfectSwitch @@ -122,7 +126,7 @@ Switch::getThrottle(LinkID link_number) const return m_throttles[link_number]; } -const Vector<Throttle*>* +const vector<Throttle*>* Switch::getThrottles() const { return &m_throttles; @@ -172,18 +176,21 @@ Switch::printStats(std::ostream& out) const if (!throttle_ptr) continue; - const Vector<Vector<int> >& message_counts = + const vector<vector<int> >& message_counts = throttle_ptr->getCounters(); for (int int_type = 0; int_type < MessageSizeType_NUM; int_type++) { MessageSizeType type = MessageSizeType(int_type); - int sum = message_counts[type].sum(); + const vector<int> &mct = message_counts[type]; + int sum = accumulate(mct.begin(), mct.end(), 0); if (sum == 0) continue; out << " outgoing_messages_switch_" << m_switch_id << "_link_" << link << "_" << type << ": " << sum << " " << sum * RubySystem::getNetwork()->MessageSizeType_to_int(type) - << " " << message_counts[type] << " base_latency: " + << " "; + out << mct; + out << " base_latency: " << throttle_ptr->getLatency() << endl; } } diff --git a/src/mem/ruby/network/simple/Switch.hh b/src/mem/ruby/network/simple/Switch.hh index 598450df3..6e80c8642 100644 --- a/src/mem/ruby/network/simple/Switch.hh +++ b/src/mem/ruby/network/simple/Switch.hh @@ -40,8 +40,8 @@ #define __MEM_RUBY_NETWORK_SIMPLE_SWITCH_HH__ #include <iostream> +#include <vector> -#include "mem/gems_common/Vector.hh" #include "mem/ruby/common/Global.hh" class MessageBuffer; @@ -57,12 +57,12 @@ class Switch Switch(SwitchID sid, SimpleNetwork* network_ptr); ~Switch(); - void addInPort(const Vector<MessageBuffer*>& in); - void addOutPort(const Vector<MessageBuffer*>& out, + void addInPort(const std::vector<MessageBuffer*>& in); + void addOutPort(const std::vector<MessageBuffer*>& out, const NetDest& routing_table_entry, int link_latency, int bw_multiplier); const Throttle* getThrottle(LinkID link_number) const; - const Vector<Throttle*>* getThrottles() const; + const std::vector<Throttle*>* getThrottles() const; void clearRoutingTables(); void clearBuffers(); void reconfigureOutPort(const NetDest& routing_table_entry); @@ -80,8 +80,8 @@ class Switch PerfectSwitch* m_perfect_switch_ptr; Network* m_network_ptr; - Vector<Throttle*> m_throttles; - Vector<MessageBuffer*> m_buffers_to_free; + std::vector<Throttle*> m_throttles; + std::vector<MessageBuffer*> m_buffers_to_free; SwitchID m_switch_id; }; diff --git a/src/mem/ruby/network/simple/Throttle.cc b/src/mem/ruby/network/simple/Throttle.cc index 5d74afb24..a77d40dee 100644 --- a/src/mem/ruby/network/simple/Throttle.cc +++ b/src/mem/ruby/network/simple/Throttle.cc @@ -85,17 +85,17 @@ Throttle::clear() } void -Throttle::addLinks(const Vector<MessageBuffer*>& in_vec, - const Vector<MessageBuffer*>& out_vec) +Throttle::addLinks(const std::vector<MessageBuffer*>& in_vec, + const std::vector<MessageBuffer*>& out_vec) { assert(in_vec.size() == out_vec.size()); for (int i=0; i<in_vec.size(); i++) { addVirtualNetwork(in_vec[i], out_vec[i]); } - m_message_counters.setSize(MessageSizeType_NUM); + m_message_counters.resize(MessageSizeType_NUM); for (int i = 0; i < MessageSizeType_NUM; i++) { - m_message_counters[i].setSize(in_vec.size()); + m_message_counters[i].resize(in_vec.size()); for (int j = 0; j<m_message_counters[i].size(); j++) { m_message_counters[i][j] = 0; } @@ -105,9 +105,9 @@ Throttle::addLinks(const Vector<MessageBuffer*>& in_vec, void Throttle::addVirtualNetwork(MessageBuffer* in_ptr, MessageBuffer* out_ptr) { - m_units_remaining.insertAtBottom(0); - m_in.insertAtBottom(in_ptr); - m_out.insertAtBottom(out_ptr); + m_units_remaining.push_back(0); + m_in.push_back(in_ptr); + m_out.push_back(out_ptr); // Set consumer and description m_in[m_vnets]->setConsumer(this); diff --git a/src/mem/ruby/network/simple/Throttle.hh b/src/mem/ruby/network/simple/Throttle.hh index 74cd7b356..c80f24d77 100644 --- a/src/mem/ruby/network/simple/Throttle.hh +++ b/src/mem/ruby/network/simple/Throttle.hh @@ -39,8 +39,8 @@ #define __MEM_RUBY_NETWORK_SIMPLE_THROTTLE_HH__ #include <iostream> +#include <vector> -#include "mem/gems_common/Vector.hh" #include "mem/ruby/common/Consumer.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/network/Network.hh" @@ -57,8 +57,8 @@ class Throttle : public Consumer Throttle(NodeID node, int link_latency, int link_bandwidth_multiplier); ~Throttle() {} - void addLinks(const Vector<MessageBuffer*>& in_vec, - const Vector<MessageBuffer*>& out_vec); + void addLinks(const std::vector<MessageBuffer*>& in_vec, + const std::vector<MessageBuffer*>& out_vec); void wakeup(); void printStats(std::ostream& out) const; @@ -74,7 +74,7 @@ class Throttle : public Consumer } int getLatency() const { return m_link_latency; } - const Vector<Vector<int> >& + const std::vector<std::vector<int> >& getCounters() const { return m_message_counters; @@ -93,11 +93,11 @@ class Throttle : public Consumer Throttle(const Throttle& obj); Throttle& operator=(const Throttle& obj); - Vector<MessageBuffer*> m_in; - Vector<MessageBuffer*> m_out; - Vector<Vector<int> > m_message_counters; + std::vector<MessageBuffer*> m_in; + std::vector<MessageBuffer*> m_out; + std::vector<std::vector<int> > m_message_counters; int m_vnets; - Vector<int> m_units_remaining; + std::vector<int> m_units_remaining; int m_sID; NodeID m_node; int m_link_bandwidth_multiplier; diff --git a/src/mem/ruby/network/simple/Topology.cc b/src/mem/ruby/network/simple/Topology.cc index 18618580a..bd167bd40 100644 --- a/src/mem/ruby/network/simple/Topology.cc +++ b/src/mem/ruby/network/simple/Topology.cc @@ -63,8 +63,8 @@ Topology::Topology(const Params *p) m_print_config = p->print_config; m_number_of_switches = p->num_int_nodes; // initialize component latencies record - m_component_latencies.setSize(0); - m_component_inter_switches.setSize(0); + m_component_latencies.resize(0); + m_component_inter_switches.resize(0); // Total nodes/controllers in network // Must make sure this is called after the State Machine constructors @@ -85,7 +85,7 @@ Topology::Topology(const Params *p) AbstractController *c = p->ext_node; // Store the controller pointers for later - m_controller_vector.insertAtBottom(c); + m_controller_vector.push_back(c); int ext_idx1 = MachineType_base_number(c->getMachineType()) + c->getVersion(); @@ -133,24 +133,24 @@ Topology::createLinks(Network *net, bool isReconfiguration) Matrix topology_latency; Matrix topology_bw_multis; int num_switches = max_switch_id+1; - topology_weights.setSize(num_switches); - topology_latency.setSize(num_switches); - topology_bw_multis.setSize(num_switches); + topology_weights.resize(num_switches); + topology_latency.resize(num_switches); + topology_bw_multis.resize(num_switches); // FIXME setting the size of a member variable here is a HACK! - m_component_latencies.setSize(num_switches); + m_component_latencies.resize(num_switches); // FIXME setting the size of a member variable here is a HACK! - m_component_inter_switches.setSize(num_switches); + m_component_inter_switches.resize(num_switches); for (int i = 0; i < topology_weights.size(); i++) { - topology_weights[i].setSize(num_switches); - topology_latency[i].setSize(num_switches); - topology_bw_multis[i].setSize(num_switches); - m_component_latencies[i].setSize(num_switches); + topology_weights[i].resize(num_switches); + topology_latency[i].resize(num_switches); + topology_bw_multis[i].resize(num_switches); + m_component_latencies[i].resize(num_switches); // FIXME setting the size of a member variable here is a HACK! - m_component_inter_switches[i].setSize(num_switches); + m_component_inter_switches[i].resize(num_switches); for (int j = 0; j < topology_weights[i].size(); j++) { topology_weights[i][j] = INFINITE_LATENCY; @@ -226,11 +226,11 @@ Topology::addLink(SwitchID src, SwitchID dest, int link_latency, { ASSERT(src <= m_number_of_switches+m_nodes+m_nodes); ASSERT(dest <= m_number_of_switches+m_nodes+m_nodes); - m_links_src_vector.insertAtBottom(src); - m_links_dest_vector.insertAtBottom(dest); - m_links_latency_vector.insertAtBottom(link_latency); - m_links_weight_vector.insertAtBottom(link_weight); - m_bw_multiplier_vector.insertAtBottom(bw_multiplier); + m_links_src_vector.push_back(src); + m_links_dest_vector.push_back(dest); + m_links_latency_vector.push_back(link_latency); + m_links_weight_vector.push_back(link_weight); + m_bw_multiplier_vector.push_back(bw_multiplier); } void diff --git a/src/mem/ruby/network/simple/Topology.hh b/src/mem/ruby/network/simple/Topology.hh index 9bcc66c81..c92848d8f 100644 --- a/src/mem/ruby/network/simple/Topology.hh +++ b/src/mem/ruby/network/simple/Topology.hh @@ -42,8 +42,8 @@ #include <iostream> #include <string> +#include <vector> -#include "mem/gems_common/Vector.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/system/NodeID.hh" #include "params/ExtLink.hh" @@ -55,7 +55,7 @@ class Network; class NetDest; -typedef Vector<Vector<int> > Matrix; +typedef std::vector<std::vector<int> > Matrix; class Link : public SimObject { @@ -111,8 +111,9 @@ class Topology : public SimObject const NetDest& routing_table_entry, int link_latency, int weight, int bw_multiplier, bool isReconfiguration); - //void makeSwitchesPerChip(Vector<Vector< SwitchID> > &nodePairs, - // Vector<int> &latencies, Vector<int> &bw_multis, int numberOfChips); + //void makeSwitchesPerChip(std::vector<std::vector<SwitchID > > &nodePairs, + // std::vector<int> &latencies, std::vector<int> &bw_multis, + // int numberOfChips); std::string getDesignStr(); // Private copy constructor and assignment operator @@ -124,13 +125,13 @@ class Topology : public SimObject NodeID m_nodes; int m_number_of_switches; - Vector<AbstractController*> m_controller_vector; + std::vector<AbstractController*> m_controller_vector; - Vector<SwitchID> m_links_src_vector; - Vector<SwitchID> m_links_dest_vector; - Vector<int> m_links_latency_vector; - Vector<int> m_links_weight_vector; - Vector<int> m_bw_multiplier_vector; + std::vector<SwitchID> m_links_src_vector; + std::vector<SwitchID> m_links_dest_vector; + std::vector<int> m_links_latency_vector; + std::vector<int> m_links_weight_vector; + std::vector<int> m_bw_multiplier_vector; Matrix m_component_latencies; Matrix m_component_inter_switches; |