diff options
Diffstat (limited to 'src/mem/ruby/network')
-rw-r--r-- | src/mem/ruby/network/Network.hh | 13 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/PerfectSwitch.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/SimpleNetwork.cc | 38 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/SimpleNetwork.hh | 3 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Switch.cc | 22 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Switch.hh | 3 |
6 files changed, 78 insertions, 2 deletions
diff --git a/src/mem/ruby/network/Network.hh b/src/mem/ruby/network/Network.hh index e9c5a98b7..9236a2207 100644 --- a/src/mem/ruby/network/Network.hh +++ b/src/mem/ruby/network/Network.hh @@ -44,6 +44,7 @@ #include <string> #include <vector> +#include "mem/packet.hh" #include "mem/protocol/LinkDirection.hh" #include "mem/protocol/MessageSizeType.hh" #include "mem/ruby/common/TypeDefines.hh" @@ -81,7 +82,7 @@ class Network : public SimObject bool isReconfiguration) = 0; virtual void makeInLink(NodeID src, SwitchID dest, BasicLink* link, LinkDirection direction, - const NetDest& routing_table_entry, + const NetDest& routing_table_entry, bool isReconfiguration) = 0; virtual void makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link, LinkDirection direction, @@ -94,6 +95,16 @@ class Network : public SimObject virtual void clearStats() = 0; virtual void print(std::ostream& out) const = 0; + /* + * Virtual functions for functionally reading and writing packets in + * the network. Each network needs to implement these for functional + * accesses to work correctly. + */ + virtual bool functionalRead(Packet *pkt) + { fatal("Functional read not implemented.\n"); } + virtual uint32_t functionalWrite(Packet *pkt) + { fatal("Functional write not implemented.\n"); } + protected: // Private copy constructor and assignment operator Network(const Network& obj); diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc index 2c845683d..b38b6d539 100644 --- a/src/mem/ruby/network/simple/PerfectSwitch.cc +++ b/src/mem/ruby/network/simple/PerfectSwitch.cc @@ -343,4 +343,3 @@ PerfectSwitch::print(std::ostream& out) const { out << "[PerfectSwitch " << m_switch_id << "]"; } - diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc index 7aa8e62f9..9df9ed3a5 100644 --- a/src/mem/ruby/network/simple/SimpleNetwork.cc +++ b/src/mem/ruby/network/simple/SimpleNetwork.cc @@ -327,3 +327,41 @@ SimpleNetworkParams::create() { return new SimpleNetwork(this); } + +/* + * The simple network has an array of switches. These switches have buffers + * that need to be accessed for functional reads and writes. Also the links + * between different switches have buffers that need to be accessed. + */ +bool +SimpleNetwork::functionalRead(Packet *pkt) +{ + for (unsigned int i = 0; i < m_switch_ptr_vector.size(); i++) { + if (m_switch_ptr_vector[i]->functionalRead(pkt)) { + return true; + } + } + + for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) { + if (m_buffers_to_free[i]->functionalRead(pkt)) { + return true; + } + } + + return false; +} + +uint32_t +SimpleNetwork::functionalWrite(Packet *pkt) +{ + uint32_t num_functional_writes = 0; + + for (unsigned int i = 0; i < m_switch_ptr_vector.size(); i++) { + num_functional_writes += m_switch_ptr_vector[i]->functionalWrite(pkt); + } + + for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) { + num_functional_writes += m_buffers_to_free[i]->functionalWrite(pkt); + } + return num_functional_writes; +} diff --git a/src/mem/ruby/network/simple/SimpleNetwork.hh b/src/mem/ruby/network/simple/SimpleNetwork.hh index 6dfaa2724..879446822 100644 --- a/src/mem/ruby/network/simple/SimpleNetwork.hh +++ b/src/mem/ruby/network/simple/SimpleNetwork.hh @@ -86,6 +86,9 @@ class SimpleNetwork : public Network void print(std::ostream& out) const; + bool functionalRead(Packet *pkt); + uint32_t functionalWrite(Packet *pkt); + private: void checkNetworkAllocation(NodeID id, bool ordered, int network_num); void addLink(SwitchID src, SwitchID dest, int link_latency); diff --git a/src/mem/ruby/network/simple/Switch.cc b/src/mem/ruby/network/simple/Switch.cc index 5c2f5a717..a0a27f758 100644 --- a/src/mem/ruby/network/simple/Switch.cc +++ b/src/mem/ruby/network/simple/Switch.cc @@ -217,6 +217,28 @@ Switch::print(std::ostream& out) const // FIXME printing out << "[Switch]"; } +bool +Switch::functionalRead(Packet *pkt) +{ + // Access the buffers in the switch for performing a functional read + for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) { + if (m_buffers_to_free[i]->functionalRead(pkt)) { + return true; + } + } + return false; +} + +uint32_t +Switch::functionalWrite(Packet *pkt) +{ + // Access the buffers in the switch for performing a functional write + uint32_t num_functional_writes = 0; + for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) { + num_functional_writes += m_buffers_to_free[i]->functionalWrite(pkt); + } + return num_functional_writes; +} Switch * SwitchParams::create() diff --git a/src/mem/ruby/network/simple/Switch.hh b/src/mem/ruby/network/simple/Switch.hh index 9946e5cc1..05e90f278 100644 --- a/src/mem/ruby/network/simple/Switch.hh +++ b/src/mem/ruby/network/simple/Switch.hh @@ -74,6 +74,9 @@ class Switch : public BasicRouter void print(std::ostream& out) const; void init_net_ptr(SimpleNetwork* net_ptr) { m_network_ptr = net_ptr; } + bool functionalRead(Packet *); + uint32_t functionalWrite(Packet *); + private: // Private copy constructor and assignment operator Switch(const Switch& obj); |