diff options
Diffstat (limited to 'src/mem/ruby/profiler')
-rw-r--r-- | src/mem/ruby/profiler/AccessTraceForAddress.cc | 19 | ||||
-rw-r--r-- | src/mem/ruby/profiler/AccessTraceForAddress.hh | 7 | ||||
-rw-r--r-- | src/mem/ruby/profiler/AddressProfiler.cc | 58 | ||||
-rw-r--r-- | src/mem/ruby/profiler/AddressProfiler.hh | 14 | ||||
-rw-r--r-- | src/mem/ruby/profiler/CacheProfiler.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/profiler/Profiler.cc | 47 | ||||
-rw-r--r-- | src/mem/ruby/profiler/Profiler.hh | 8 |
7 files changed, 67 insertions, 87 deletions
diff --git a/src/mem/ruby/profiler/AccessTraceForAddress.cc b/src/mem/ruby/profiler/AccessTraceForAddress.cc index 79661ed18..e7aaa2515 100644 --- a/src/mem/ruby/profiler/AccessTraceForAddress.cc +++ b/src/mem/ruby/profiler/AccessTraceForAddress.cc @@ -29,26 +29,9 @@ #include "mem/ruby/common/Histogram.hh" #include "mem/ruby/profiler/AccessTraceForAddress.hh" -AccessTraceForAddress::AccessTraceForAddress() -{ - m_histogram_ptr = NULL; -} - -AccessTraceForAddress::AccessTraceForAddress(const Address& addr) -{ - m_addr = addr; - m_total = 0; - m_loads = 0; - m_stores = 0; - m_atomics = 0; - m_user = 0; - m_sharing = 0; - m_histogram_ptr = NULL; -} - AccessTraceForAddress::~AccessTraceForAddress() { - if (m_histogram_ptr != NULL) { + if (m_histogram_ptr) { delete m_histogram_ptr; m_histogram_ptr = NULL; } diff --git a/src/mem/ruby/profiler/AccessTraceForAddress.hh b/src/mem/ruby/profiler/AccessTraceForAddress.hh index 7ca875f3f..a707cd4df 100644 --- a/src/mem/ruby/profiler/AccessTraceForAddress.hh +++ b/src/mem/ruby/profiler/AccessTraceForAddress.hh @@ -43,10 +43,13 @@ class Histogram; class AccessTraceForAddress { public: - AccessTraceForAddress(); - explicit AccessTraceForAddress(const Address& addr); + AccessTraceForAddress() + : m_loads(0), m_stores(0), m_atomics(0), m_total(0), m_user(0), + m_sharing(0), m_histogram_ptr(NULL) + { } ~AccessTraceForAddress(); + void setAddress(const Address& addr) { m_addr = addr; } void update(CacheRequestType type, AccessModeType access_mode, NodeID cpu, bool sharing_miss); int getTotal() const; diff --git a/src/mem/ruby/profiler/AddressProfiler.cc b/src/mem/ruby/profiler/AddressProfiler.cc index 2c099a914..4274569ad 100644 --- a/src/mem/ruby/profiler/AddressProfiler.cc +++ b/src/mem/ruby/profiler/AddressProfiler.cc @@ -29,10 +29,8 @@ #include <vector> #include "base/stl_helpers.hh" -#include "mem/gems_common/Map.hh" #include "mem/gems_common/PrioHeap.hh" #include "mem/protocol/CacheMsg.hh" -#include "mem/ruby/profiler/AccessTraceForAddress.hh" #include "mem/ruby/profiler/AddressProfiler.hh" #include "mem/ruby/profiler/Profiler.hh" #include "mem/ruby/system/System.hh" @@ -44,30 +42,46 @@ using m5::stl_helpers::operator<<; // Helper functions AccessTraceForAddress& -lookupTraceForAddress(const Address& addr, AddressMap* record_map) +lookupTraceForAddress(const Address& addr, AddressMap& record_map) { - if (!record_map->exist(addr)) { - record_map->add(addr, AccessTraceForAddress(addr)); + // we create a static default object here that is used to insert + // since the insertion will create a copy of the object in the + // process. Perhaps this is optimizing early, but it doesn't seem + // like it could hurt. + static const AccessTraceForAddress dflt; + + pair<AddressMap::iterator, bool> r = + record_map.insert(make_pair(addr, dflt)); + AddressMap::iterator i = r.first; + AccessTraceForAddress &access_trace = i->second; + if (r.second) { + // there was nothing there and the insert succeed, so we need + // to actually set the address. + access_trace.setAddress(addr); } - return record_map->lookup(addr); + + return access_trace; } void -printSorted(ostream& out, int num_of_sequencers, const AddressMap* record_map, +printSorted(ostream& out, int num_of_sequencers, const AddressMap &record_map, string description) { const int records_printed = 100; uint64 misses = 0; - PrioHeap<AccessTraceForAddress*> heap; - std::vector<Address> keys = record_map->keys(); - for (int i = 0; i < keys.size(); i++) { - AccessTraceForAddress* record = &(record_map->lookup(keys[i])); + PrioHeap<const AccessTraceForAddress*> heap; + + AddressMap::const_iterator i = record_map.begin(); + AddressMap::const_iterator end = record_map.end(); + for (; i != end; ++i) { + const AccessTraceForAddress* record = &i->second; misses += record->getTotal(); heap.insert(record); } - out << "Total_entries_" << description << ": " << keys.size() << endl; + out << "Total_entries_" << description << ": " << record_map.size() + << endl; if (g_system_ptr->getProfiler()->getAllInstructions()) out << "Total_Instructions_" << description << ": " << misses << endl; else @@ -93,7 +107,7 @@ printSorted(ostream& out, int num_of_sequencers, const AddressMap* record_map, int counter = 0; while (heap.size() > 0 && counter < records_printed) { - AccessTraceForAddress* record = heap.extractMin(); + const AccessTraceForAddress* record = heap.extractMin(); double percent = 100.0 * (record->getTotal() / double(misses)); out << description << " | " << percent << " % " << *record << endl; all_records.add(record->getTotal()); @@ -104,7 +118,7 @@ printSorted(ostream& out, int num_of_sequencers, const AddressMap* record_map, } while (heap.size() > 0) { - AccessTraceForAddress* record = heap.extractMin(); + const AccessTraceForAddress* record = heap.extractMin(); all_records.add(record->getTotal()); remaining_records.add(record->getTotal()); all_records_log.add(record->getTotal()); @@ -130,20 +144,12 @@ printSorted(ostream& out, int num_of_sequencers, const AddressMap* record_map, AddressProfiler::AddressProfiler(int num_of_sequencers) { - m_dataAccessTrace = new AddressMap; - m_macroBlockAccessTrace = new AddressMap; - m_programCounterAccessTrace = new AddressMap; - m_retryProfileMap = new AddressMap; m_num_of_sequencers = num_of_sequencers; clearStats(); } AddressProfiler::~AddressProfiler() { - delete m_dataAccessTrace; - delete m_macroBlockAccessTrace; - delete m_programCounterAccessTrace; - delete m_retryProfileMap; } void @@ -225,10 +231,10 @@ AddressProfiler::clearStats() { // Clear the maps m_sharing_miss_counter = 0; - m_dataAccessTrace->clear(); - m_macroBlockAccessTrace->clear(); - m_programCounterAccessTrace->clear(); - m_retryProfileMap->clear(); + m_dataAccessTrace.clear(); + m_macroBlockAccessTrace.clear(); + m_programCounterAccessTrace.clear(); + m_retryProfileMap.clear(); m_retryProfileHisto.clear(); m_retryProfileHistoRead.clear(); m_retryProfileHistoWrite.clear(); diff --git a/src/mem/ruby/profiler/AddressProfiler.hh b/src/mem/ruby/profiler/AddressProfiler.hh index dd6cea52b..5422fe095 100644 --- a/src/mem/ruby/profiler/AddressProfiler.hh +++ b/src/mem/ruby/profiler/AddressProfiler.hh @@ -31,21 +31,21 @@ #include <iostream> +#include "base/hashmap.hh" #include "mem/protocol/AccessType.hh" #include "mem/protocol/CacheMsg.hh" #include "mem/ruby/common/Address.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/common/Histogram.hh" +#include "mem/ruby/profiler/AccessTraceForAddress.hh" #include "mem/ruby/system/NodeID.hh" -class AccessTraceForAddress; class Set; -template <class KEY_TYPE, class VALUE_TYPE> class Map; class AddressProfiler { public: - typedef Map<Address, AccessTraceForAddress> AddressMap; + typedef m5::hash_map<Address, AccessTraceForAddress> AddressMap; public: AddressProfiler(int num_of_sequencers); @@ -76,10 +76,10 @@ class AddressProfiler int64 m_sharing_miss_counter; - AddressMap* m_dataAccessTrace; - AddressMap* m_macroBlockAccessTrace; - AddressMap* m_programCounterAccessTrace; - AddressMap* m_retryProfileMap; + AddressMap m_dataAccessTrace; + AddressMap m_macroBlockAccessTrace; + AddressMap m_programCounterAccessTrace; + AddressMap m_retryProfileMap; Histogram m_retryProfileHisto; Histogram m_retryProfileHistoWrite; Histogram m_retryProfileHistoRead; diff --git a/src/mem/ruby/profiler/CacheProfiler.cc b/src/mem/ruby/profiler/CacheProfiler.cc index 7dc925322..8ba64add9 100644 --- a/src/mem/ruby/profiler/CacheProfiler.cc +++ b/src/mem/ruby/profiler/CacheProfiler.cc @@ -27,7 +27,6 @@ */ #include "mem/gems_common/PrioHeap.hh" -#include "mem/ruby/profiler/AccessTraceForAddress.hh" #include "mem/ruby/profiler/CacheProfiler.hh" #include "mem/ruby/profiler/Profiler.hh" #include "mem/ruby/system/System.hh" diff --git a/src/mem/ruby/profiler/Profiler.cc b/src/mem/ruby/profiler/Profiler.cc index bbc3c5846..33d490a85 100644 --- a/src/mem/ruby/profiler/Profiler.cc +++ b/src/mem/ruby/profiler/Profiler.cc @@ -50,7 +50,6 @@ #include "base/stl_helpers.hh" #include "base/str.hh" -#include "mem/gems_common/Map.hh" #include "mem/gems_common/PrioHeap.hh" #include "mem/protocol/CacheMsg.hh" #include "mem/protocol/MachineType.hh" @@ -73,8 +72,6 @@ static double process_memory_resident(); Profiler::Profiler(const Params *p) : SimObject(p) { - m_requestProfileMap_ptr = new Map<string, int>; - m_inst_profiler_ptr = NULL; m_address_profiler_ptr = NULL; @@ -106,8 +103,6 @@ Profiler::~Profiler() if (m_periodic_output_file_ptr != &cerr) { delete m_periodic_output_file_ptr; } - - delete m_requestProfileMap_ptr; } void @@ -355,20 +350,20 @@ Profiler::printStats(ostream& out, bool short_stats) out << "--------------------------------" << endl; out << endl; - vector<string> requestProfileKeys = m_requestProfileMap_ptr->keys(); - sort(requestProfileKeys.begin(), requestProfileKeys.end()); + map<string, int>::const_iterator i = m_requestProfileMap.begin(); + map<string, int>::const_iterator end = m_requestProfileMap.end(); + for (; i != end; ++i) { + const string &key = i->first; + int count = i->second; - for (int i = 0; i < requestProfileKeys.size(); i++) { - int temp_int = - m_requestProfileMap_ptr->lookup(requestProfileKeys[i]); - double percent = (100.0 * double(temp_int)) / double(m_requests); + double percent = (100.0 * double(count)) / double(m_requests); vector<string> items; - tokenize(items, requestProfileKeys[i], ':'); - vector<string>::iterator i = items.begin(); + tokenize(items, key, ':'); + vector<string>::iterator j = items.begin(); vector<string>::iterator end = items.end(); - for (; i != end; ++i) - out << setw(10) << *i; - out << setw(11) << temp_int; + for (; j != end; ++i) + out << setw(10) << *j; + out << setw(11) << count; out << setw(14) << percent << endl; } out << endl; @@ -480,7 +475,7 @@ Profiler::clearStats() m_memory_to_cache = 0; // clear HashMaps - m_requestProfileMap_ptr->clear(); + m_requestProfileMap.clear(); // count requests profiled m_requests = 0; @@ -555,11 +550,9 @@ Profiler::profileRequest(const string& requestStr) { m_requests++; - if (m_requestProfileMap_ptr->exist(requestStr)) { - (m_requestProfileMap_ptr->lookup(requestStr))++; - } else { - m_requestProfileMap_ptr->add(requestStr, 1); - } + // if it doesn't exist, conveniently, it will be created with the + // default value which is 0 + m_requestProfileMap[requestStr]++; } void @@ -679,18 +672,14 @@ Profiler::rubyWatch(int id) out << setw(ID_SPACES) << id << " " << "RUBY WATCH " << watch_address << endl; - if (!m_watch_address_list_ptr->exist(watch_address)) { - m_watch_address_list_ptr->add(watch_address, 1); - } + // don't care about success or failure + m_watch_address_set.insert(watch_address); } bool Profiler::watchAddress(Address addr) { - if (m_watch_address_list_ptr->exist(addr)) - return true; - else - return false; + return m_watch_address_set.count(addr) > 0; } Profiler * diff --git a/src/mem/ruby/profiler/Profiler.hh b/src/mem/ruby/profiler/Profiler.hh index 5d8650dec..20491cab7 100644 --- a/src/mem/ruby/profiler/Profiler.hh +++ b/src/mem/ruby/profiler/Profiler.hh @@ -46,9 +46,11 @@ #define __MEM_RUBY_PROFILER_PROFILER_HH__ #include <iostream> +#include <map> #include <string> #include <vector> +#include "base/hashmap.hh" #include "mem/protocol/AccessModeType.hh" #include "mem/protocol/AccessType.hh" #include "mem/protocol/CacheRequestType.hh" @@ -70,8 +72,6 @@ class CacheMsg; class AddressProfiler; -template <class KEY_TYPE, class VALUE_TYPE> class Map; - class Profiler : public SimObject, public Consumer { public: @@ -210,10 +210,10 @@ class Profiler : public SimObject, public Consumer Histogram m_average_latency_estimate; - Map<Address, int>* m_watch_address_list_ptr; + m5::hash_set<Address> m_watch_address_set; // counts all initiated cache request including PUTs int m_requests; - Map <std::string, int>* m_requestProfileMap_ptr; + std::map<std::string, int> m_requestProfileMap; //added by SS bool m_hot_lines; |