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-rw-r--r--src/mem/ruby/slicc_interface/Controller.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/ruby/slicc_interface/Controller.py b/src/mem/ruby/slicc_interface/Controller.py
index aa8f35145..5c2fd9b71 100644
--- a/src/mem/ruby/slicc_interface/Controller.py
+++ b/src/mem/ruby/slicc_interface/Controller.py
@@ -40,6 +40,6 @@ class RubyController(ClockedObject):
transitions_per_cycle = \
Param.Int(32, "no. of SLICC state machine transitions per cycle")
buffer_size = Param.Int(0, "max buffer size 0 means infinite")
- recycle_latency = Param.Int(10, "")
+ recycle_latency = Param.Cycles(10, "")
number_of_TBEs = Param.Int(256, "")
ruby_system = Param.RubySystem("");