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-rw-r--r--src/mem/ruby/slicc_interface/Controller.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/ruby/slicc_interface/Controller.py b/src/mem/ruby/slicc_interface/Controller.py
index 9787b5ce7..aa8f35145 100644
--- a/src/mem/ruby/slicc_interface/Controller.py
+++ b/src/mem/ruby/slicc_interface/Controller.py
@@ -28,9 +28,9 @@
# Brad Beckmann
from m5.params import *
-from m5.SimObject import SimObject
+from ClockedObject import ClockedObject
-class RubyController(SimObject):
+class RubyController(ClockedObject):
type = 'RubyController'
cxx_class = 'AbstractController'
cxx_header = "mem/ruby/slicc_interface/AbstractController.hh"