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-rw-r--r--src/mem/ruby/slicc_interface/Controller.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mem/ruby/slicc_interface/Controller.py b/src/mem/ruby/slicc_interface/Controller.py
index 638d50b61..f82e0a70d 100644
--- a/src/mem/ruby/slicc_interface/Controller.py
+++ b/src/mem/ruby/slicc_interface/Controller.py
@@ -40,7 +40,8 @@ class RubyController(ClockedObject):
transitions_per_cycle = \
Param.Int(32, "no. of SLICC state machine transitions per cycle")
- buffer_size = Param.Int(0, "max buffer size 0 means infinite")
+ buffer_size = Param.UInt32(0, "max buffer size 0 means infinite")
+
recycle_latency = Param.Cycles(10, "")
number_of_TBEs = Param.Int(256, "")
ruby_system = Param.RubySystem("")