diff options
Diffstat (limited to 'src/mem/ruby/slicc_interface')
| -rw-r--r-- | src/mem/ruby/slicc_interface/AbstractController.hh | 1 | ||||
| -rw-r--r-- | src/mem/ruby/slicc_interface/Controller.py | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractController.hh b/src/mem/ruby/slicc_interface/AbstractController.hh index 44e47c8ca..fcfe104b3 100644 --- a/src/mem/ruby/slicc_interface/AbstractController.hh +++ b/src/mem/ruby/slicc_interface/AbstractController.hh @@ -47,6 +47,7 @@ class AbstractController : public SimObject, public Consumer public: typedef RubyControllerParams Params; AbstractController(const Params *p) : SimObject(p) {} + const Params *params() const { return (const Params *)_params; } // returns the number of controllers created of the specific subtype // virtual int getNumberOfControllers() const = 0; diff --git a/src/mem/ruby/slicc_interface/Controller.py b/src/mem/ruby/slicc_interface/Controller.py index dc65e7f7e..a5ad45145 100644 --- a/src/mem/ruby/slicc_interface/Controller.py +++ b/src/mem/ruby/slicc_interface/Controller.py @@ -35,6 +35,7 @@ class RubyController(SimObject): cxx_class = 'AbstractController' abstract = True version = Param.Int("") + cntrl_id = Param.Int("") transitions_per_cycle = \ Param.Int(32, "no. of SLICC state machine transitions per cycle") buffer_size = Param.Int(0, "max buffer size 0 means infinite") |