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-rw-r--r--src/mem/ruby/slicc_interface/AbstractChip.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractChip.hh b/src/mem/ruby/slicc_interface/AbstractChip.hh
index 9d113a1e1..05039d09d 100644
--- a/src/mem/ruby/slicc_interface/AbstractChip.hh
+++ b/src/mem/ruby/slicc_interface/AbstractChip.hh
@@ -69,7 +69,7 @@ public:
TransactionInterfaceManager* getTransactionInterfaceManager(int index) const { return m_L1Cache_xact_mgr_vec[index]; };
void setTransactionInterfaceManager(TransactionInterfaceManager* manager, int index) { m_L1Cache_xact_mgr_vec[index] = manager; }
- // used when CHECK_COHERENCE is enabled. See System::checkGlobalCoherence()
+ // used when CHECK_COHERENCE is enabled. See RubySystem::checkGlobalCoherence()
virtual bool isBlockExclusive(const Address& addr) const { return false; }
virtual bool isBlockShared(const Address& addr) const { return false; }