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-rw-r--r--src/mem/ruby/structures/CacheMemory.hh3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
index 57f2885b6..792d8fd93 100644
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -96,7 +96,6 @@ class CacheMemory : public SimObject
AbstractCacheEntry* lookup(const Address& address);
const AbstractCacheEntry* lookup(const Address& address) const;
- Cycles getLatency() const { return m_latency; }
Cycles getTagLatency() const { return tagArray.getLatency(); }
Cycles getDataLatency() const { return dataArray.getLatency(); }
@@ -159,8 +158,6 @@ class CacheMemory : public SimObject
CacheMemory& operator=(const CacheMemory& obj);
private:
- Cycles m_latency;
-
// Data Members (m_prefix)
bool m_is_instruction_only_cache;