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-rw-r--r--src/mem/ruby/structures/CacheMemory.hh2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
index af5e680d8..57f2885b6 100644
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -100,6 +100,8 @@ class CacheMemory : public SimObject
Cycles getTagLatency() const { return tagArray.getLatency(); }
Cycles getDataLatency() const { return dataArray.getLatency(); }
+ bool isBlockInvalid(int64 cache_set, int64 loc);
+ bool isBlockNotBusy(int64 cache_set, int64 loc);
// Hook for checkpointing the contents of the cache
void recordCacheContents(int cntrl, CacheRecorder* tr) const;