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-rw-r--r--src/mem/ruby/structures/CacheMemory.hh5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
index a777538b2..82bb65776 100644
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -1,5 +1,6 @@
/*
* Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -131,6 +132,10 @@ class CacheMemory : public SimObject
Stats::Scalar numTagArrayStalls;
Stats::Scalar numDataArrayStalls;
+ int getCacheSize() const { return m_cache_size; }
+ int getNumBlocks() const { return m_cache_num_sets * m_cache_assoc; }
+ Address getAddressAtIdx(int idx) const;
+
private:
// convert a Address to its location in the cache
int64 addressToCacheSet(const Address& address) const;