1 files changed, 5 insertions, 12 deletions
diff --git a/src/mem/ruby/structures/TimerTable.cc b/src/mem/ruby/structures/TimerTable.cc
index 17dac6fc0..4809c8a47 100644
--- a/src/mem/ruby/structures/TimerTable.cc
+++ b/src/mem/ruby/structures/TimerTable.cc
@@ -34,14 +34,12 @@ TimerTable::TimerTable()
     : m_next_time(0)
 {
     m_consumer_ptr  = NULL;
-    m_clockobj_ptr = NULL;
-
     m_next_valid = false;
     m_next_address = 0;
 }
 
 bool
-TimerTable::isReady() const
+TimerTable::isReady(Tick curTime) const
 {
     if (m_map.empty())
         return false;
@@ -50,14 +48,12 @@ TimerTable::isReady() const
         updateNext();
     }
     assert(m_next_valid);
-    return (m_clockobj_ptr->curCycle() >= m_next_time);
+    return (curTime >= m_next_time);
 }
 
 Addr
-TimerTable::readyAddress() const
+TimerTable::nextAddress() const
 {
-    assert(isReady());
-
     if (!m_next_valid) {
         updateNext();
     }
@@ -66,17 +62,14 @@ TimerTable::readyAddress() const
 }
 
 void
-TimerTable::set(Addr address, Cycles relative_latency)
+TimerTable::set(Addr address, Tick ready_time)
 {
     assert(address == makeLineAddress(address));
-    assert(relative_latency > 0);
     assert(!m_map.count(address));
 
-    Cycles ready_time = m_clockobj_ptr->curCycle() + relative_latency;
     m_map[address] = ready_time;
     assert(m_consumer_ptr != NULL);
-    m_consumer_ptr->
-        scheduleEventAbsolute(m_clockobj_ptr->clockPeriod() * ready_time);
+    m_consumer_ptr->scheduleEventAbsolute(ready_time);
     m_next_valid = false;
 
     // Don't always recalculate the next ready address