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-rw-r--r--src/mem/ruby/structures/TBETable.hh4
-rw-r--r--src/mem/ruby/structures/TimerTable.cc17
-rw-r--r--src/mem/ruby/structures/TimerTable.hh21
3 files changed, 12 insertions, 30 deletions
diff --git a/src/mem/ruby/structures/TBETable.hh b/src/mem/ruby/structures/TBETable.hh
index cbc51dae5..4a24a5b13 100644
--- a/src/mem/ruby/structures/TBETable.hh
+++ b/src/mem/ruby/structures/TBETable.hh
@@ -47,12 +47,12 @@ class TBETable
void allocate(Addr address);
void deallocate(Addr address);
bool
- areNSlotsAvailable(int n) const
+ areNSlotsAvailable(int n, Tick current_time) const
{
return (m_number_of_TBEs - m_map.size()) >= n;
}
- ENTRY* lookup(Addr address);
+ ENTRY *lookup(Addr address);
// Print cache contents
void print(std::ostream& out) const;
diff --git a/src/mem/ruby/structures/TimerTable.cc b/src/mem/ruby/structures/TimerTable.cc
index 17dac6fc0..4809c8a47 100644
--- a/src/mem/ruby/structures/TimerTable.cc
+++ b/src/mem/ruby/structures/TimerTable.cc
@@ -34,14 +34,12 @@ TimerTable::TimerTable()
: m_next_time(0)
{
m_consumer_ptr = NULL;
- m_clockobj_ptr = NULL;
-
m_next_valid = false;
m_next_address = 0;
}
bool
-TimerTable::isReady() const
+TimerTable::isReady(Tick curTime) const
{
if (m_map.empty())
return false;
@@ -50,14 +48,12 @@ TimerTable::isReady() const
updateNext();
}
assert(m_next_valid);
- return (m_clockobj_ptr->curCycle() >= m_next_time);
+ return (curTime >= m_next_time);
}
Addr
-TimerTable::readyAddress() const
+TimerTable::nextAddress() const
{
- assert(isReady());
-
if (!m_next_valid) {
updateNext();
}
@@ -66,17 +62,14 @@ TimerTable::readyAddress() const
}
void
-TimerTable::set(Addr address, Cycles relative_latency)
+TimerTable::set(Addr address, Tick ready_time)
{
assert(address == makeLineAddress(address));
- assert(relative_latency > 0);
assert(!m_map.count(address));
- Cycles ready_time = m_clockobj_ptr->curCycle() + relative_latency;
m_map[address] = ready_time;
assert(m_consumer_ptr != NULL);
- m_consumer_ptr->
- scheduleEventAbsolute(m_clockobj_ptr->clockPeriod() * ready_time);
+ m_consumer_ptr->scheduleEventAbsolute(ready_time);
m_next_valid = false;
// Don't always recalculate the next ready address
diff --git a/src/mem/ruby/structures/TimerTable.hh b/src/mem/ruby/structures/TimerTable.hh
index 606201eb4..9efe7ca04 100644
--- a/src/mem/ruby/structures/TimerTable.hh
+++ b/src/mem/ruby/structures/TimerTable.hh
@@ -49,25 +49,16 @@ class TimerTable
m_consumer_ptr = consumer_ptr;
}
- void setClockObj(ClockedObject* obj)
- {
- assert(m_clockobj_ptr == NULL);
- m_clockobj_ptr = obj;
- }
-
void
setDescription(const std::string& name)
{
m_name = name;
}
- bool isReady() const;
- Addr readyAddress() const;
+ bool isReady(Tick curTime) const;
+ Addr nextAddress() const;
bool isSet(Addr address) const { return !!m_map.count(address); }
- void set(Addr address, Cycles relative_latency);
- void set(Addr address, uint64_t relative_latency)
- { set(address, Cycles(relative_latency)); }
-
+ void set(Addr address, Tick ready_time);
void unset(Addr address);
void print(std::ostream& out) const;
@@ -82,14 +73,12 @@ class TimerTable
// use a std::map for the address map as this container is sorted
// and ensures a well-defined iteration order
- typedef std::map<Addr, Cycles> AddressMap;
+ typedef std::map<Addr, Tick> AddressMap;
AddressMap m_map;
mutable bool m_next_valid;
- mutable Cycles m_next_time; // Only valid if m_next_valid is true
+ mutable Tick m_next_time; // Only valid if m_next_valid is true
mutable Addr m_next_address; // Only valid if m_next_valid is true
- //! Object used for querying time.
- ClockedObject* m_clockobj_ptr;
//! Consumer to signal a wakeup()
Consumer* m_consumer_ptr;