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-rw-r--r--src/mem/ruby/structures/CacheMemory.cc8
-rw-r--r--src/mem/ruby/structures/CacheMemory.hh2
2 files changed, 10 insertions, 0 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index ab2647759..931f58a8e 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -344,6 +344,14 @@ CacheMemory::setMRU(Addr address)
}
void
+CacheMemory::setMRU(const AbstractCacheEntry *e)
+{
+ uint32_t cacheSet = e->getSetIndex();
+ uint32_t loc = e->getWayIndex();
+ m_replacementPolicy_ptr->touch(cacheSet, loc, curTick());
+}
+
+void
CacheMemory::recordCacheContents(int cntrl, CacheRecorder* tr) const
{
uint64_t warmedUpBlocks = 0;
diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
index 1af446950..7ce674e61 100644
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -106,6 +106,8 @@ class CacheMemory : public SimObject
// Set this address to most recently used
void setMRU(Addr address);
+ // Set this entry to most recently used
+ void setMRU(const AbstractCacheEntry *e);
// Functions for locking and unlocking cache lines corresponding to the
// provided address. These are required for supporting atomic memory