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-rw-r--r--src/mem/ruby/system/CacheMemory.hh2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh
index ee3c1a7fc..8adc892a7 100644
--- a/src/mem/ruby/system/CacheMemory.hh
+++ b/src/mem/ruby/system/CacheMemory.hh
@@ -60,8 +60,6 @@ class CacheMemory : public SimObject
void init();
// Public Methods
- void printConfig(std::ostream& out);
-
// perform a cache access and see if we hit or not. Return true on a hit.
bool tryCacheAccess(const Address& address, RubyRequestType type,
DataBlock*& data_ptr);