diff options
Diffstat (limited to 'src/mem/ruby/system/DMASequencer.cc')
| -rw-r--r-- | src/mem/ruby/system/DMASequencer.cc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc index a7f3a8aec..4d10a1e2f 100644 --- a/src/mem/ruby/system/DMASequencer.cc +++ b/src/mem/ruby/system/DMASequencer.cc @@ -49,6 +49,10 @@ DMASequencer::init() RequestStatus DMASequencer::makeRequest(const RubyRequest &request) { + if (m_is_busy) { + return RequestStatus_BufferFull; + } + uint64_t paddr = request.paddr; uint8_t* data = request.data; int len = request.len; @@ -108,6 +112,7 @@ DMASequencer::issueNext() assert(m_is_busy == true); active_request.bytes_completed = active_request.bytes_issued; if (active_request.len == active_request.bytes_completed) { + DPRINTF(RubyDma, "DMA request completed\n"); ruby_hit_callback(active_request.pkt); m_is_busy = false; return; @@ -141,6 +146,7 @@ DMASequencer::issueNext() assert(m_mandatory_q_ptr != NULL); m_mandatory_q_ptr->enqueue(msg); active_request.bytes_issued += msg->getLen(); + DPRINTF(RubyDma, "Next DMA segment issued to the DMA cntrl\n"); } void |