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-rw-r--r--src/mem/ruby/system/DMASequencer.hh23
1 files changed, 16 insertions, 7 deletions
diff --git a/src/mem/ruby/system/DMASequencer.hh b/src/mem/ruby/system/DMASequencer.hh
index 3b408e5ac..9f1f4e503 100644
--- a/src/mem/ruby/system/DMASequencer.hh
+++ b/src/mem/ruby/system/DMASequencer.hh
@@ -31,14 +31,19 @@
#include <memory>
#include <ostream>
+#include <unordered_map>
#include "mem/protocol/DMASequencerRequestType.hh"
+#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/DataBlock.hh"
#include "mem/ruby/system/RubyPort.hh"
#include "params/DMASequencer.hh"
struct DMARequest
{
+ DMARequest(uint64_t start_paddr, int len, bool write, int bytes_completed,
+ int bytes_issued, uint8_t *data, PacketPtr pkt);
+
uint64_t start_paddr;
int len;
bool write;
@@ -57,23 +62,27 @@ class DMASequencer : public RubyPort
/* external interface */
RequestStatus makeRequest(PacketPtr pkt) override;
- bool busy() { return m_is_busy;}
- int outstandingCount() const override { return (m_is_busy ? 1 : 0); }
+ bool busy() { return m_outstanding_count > 0; }
+ int outstandingCount() const override { return m_outstanding_count; }
bool isDeadlockEventScheduled() const override { return false; }
void descheduleDeadlockEvent() override {}
/* SLICC callback */
- void dataCallback(const DataBlock & dblk);
- void ackCallback();
+ void dataCallback(const DataBlock &dblk, const Addr &addr);
+ void ackCallback(const Addr &addr);
void recordRequestType(DMASequencerRequestType requestType);
private:
- void issueNext();
+ void issueNext(const Addr &addr);
- bool m_is_busy;
uint64_t m_data_block_mask;
- DMARequest active_request;
+
+ typedef std::unordered_map<Addr, DMARequest> RequestTable;
+ RequestTable m_RequestTable;
+
+ int m_outstanding_count;
+ int m_max_outstanding_requests;
};
#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__