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Diffstat (limited to 'src/mem/ruby/system/Sequencer.py')
-rw-r--r-- | src/mem/ruby/system/Sequencer.py | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py index e545000cf..7494986e9 100644 --- a/src/mem/ruby/system/Sequencer.py +++ b/src/mem/ruby/system/Sequencer.py @@ -61,6 +61,12 @@ class RubySequencer(RubyPort): icache = Param.RubyCache("") dcache = Param.RubyCache("") + # Cache latencies currently assessed at the beginning of each access + # NOTE: Setting these values to a value greater than one will result in + # O3 CPU pipeline bubbles and negatively impact performance + # TODO: Latencies should be migrated into each top-level cache controller + icache_hit_latency = Param.Cycles(1, "Inst cache hit latency") + dcache_hit_latency = Param.Cycles(1, "Data cache hit latency") max_outstanding_requests = Param.Int(16, "max requests (incl. prefetches) outstanding") deadlock_threshold = Param.Cycles(500000, |