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-rw-r--r--src/mem/ruby/system/Sequencer.py5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py
index 8bad83db5..6f64207dc 100644
--- a/src/mem/ruby/system/Sequencer.py
+++ b/src/mem/ruby/system/Sequencer.py
@@ -73,12 +73,9 @@ class RubySequencer(RubyPort):
class DMASequencer(MemObject):
type = 'DMASequencer'
cxx_header = "mem/ruby/system/DMASequencer.hh"
- version = Param.Int(0, "")
+ version = Param.Int(0, "")
slave = SlavePort("Device slave port")
-
using_ruby_tester = Param.Bool(False, "")
- access_phys_mem = Param.Bool(True,
- "should the dma atomically update phys_mem")
ruby_system = Param.RubySystem(Parent.any, "")
system = Param.System(Parent.any, "system object")