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-rw-r--r--src/mem/ruby/system/Sequencer.py23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py
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index 000000000..add5a06a1
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+++ b/src/mem/ruby/system/Sequencer.py
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+from m5.params import *
+from MemObject import MemObject
+
+class RubyPort(MemObject):
+ type = 'RubyPort'
+ abstract = True
+ port = VectorPort("M5 port")
+ controller = Param.RubyController("")
+ version = Param.Int(0, "")
+
+class RubySequencer(RubyPort):
+ type = 'RubySequencer'
+ cxx_class = 'Sequencer'
+ icache = Param.RubyCache("")
+ dcache = Param.RubyCache("")
+ max_outstanding_requests = Param.Int(16,
+ "max requests (incl. prefetches) outstanding")
+ deadlock_threshold = Param.Int(500000,
+ "max outstanding cycles for a request before deadlock/livelock declared")
+ funcmem_port = Port("port to functional memory")
+
+class DMASequencer(RubyPort):
+ type = 'DMASequencer'