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-rw-r--r--src/mem/ruby/system/WireBuffer.hh1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mem/ruby/system/WireBuffer.hh b/src/mem/ruby/system/WireBuffer.hh
index 648019aeb..bc3afa2da 100644
--- a/src/mem/ruby/system/WireBuffer.hh
+++ b/src/mem/ruby/system/WireBuffer.hh
@@ -82,7 +82,6 @@ class WireBuffer : public SimObject
bool isReady();
bool areNSlotsAvailable(int n) { return true; }; // infinite queue length
- void printConfig(std::ostream& out);
void print(std::ostream& out) const;
void clearStats() const;
void printStats(std::ostream& out) const;