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-rw-r--r--src/mem/ruby/system/System.cc60
-rw-r--r--src/mem/ruby/system/System.hh52
2 files changed, 0 insertions, 112 deletions
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index dc8007b26..9f5ec9f09 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -42,18 +42,9 @@
#include "mem/ruby/profiler/Profiler.hh"
#include "mem/ruby/network/Network.hh"
#include "mem/ruby/recorder/Tracer.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
-#include "mem/ruby/system/Sequencer.hh"
-#include "mem/ruby/system/DMASequencer.hh"
#include "mem/ruby/system/MemoryVector.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
-#include "mem/ruby/system/CacheMemory.hh"
-#include "mem/ruby/system/DirectoryMemory.hh"
-#include "mem/ruby/network/simple/Topology.hh"
-#include "mem/ruby/network/simple/SimpleNetwork.hh"
-#include "mem/ruby/system/RubyPort.hh"
-#include "mem/ruby/system/MemoryControl.hh"
#include "base/output.hh"
int RubySystem::m_random_seed;
@@ -64,23 +55,11 @@ int RubySystem::m_block_size_bits;
uint64 RubySystem::m_memory_size_bytes;
int RubySystem::m_memory_size_bits;
-map< string, RubyPort* > RubySystem::m_ports;
-map< string, CacheMemory* > RubySystem::m_caches;
-map< string, DirectoryMemory* > RubySystem::m_directories;
-map< string, Sequencer* > RubySystem::m_sequencers;
-map< string, DMASequencer* > RubySystem::m_dma_sequencers;
-map< string, AbstractController* > RubySystem::m_controllers;
-map< string, MemoryControl* > RubySystem::m_memorycontrols;
-
-
Network* RubySystem::m_network_ptr;
-map< string, Topology*> RubySystem::m_topologies;
Profiler* RubySystem::m_profiler_ptr;
Tracer* RubySystem::m_tracer_ptr;
-
MemoryVector* RubySystem::m_mem_vec_ptr;
-
RubySystem::RubySystem(const Params *p)
: SimObject(p)
{
@@ -145,27 +124,8 @@ void RubySystem::printConfig(ostream& out)
{
out << "\n================ Begin RubySystem Configuration Print ================\n\n";
printSystemConfig(out);
- for (map<string, AbstractController*>::const_iterator it = m_controllers.begin();
- it != m_controllers.end(); it++) {
- (*it).second->printConfig(out);
- }
- for (map<string, CacheMemory*>::const_iterator it = m_caches.begin();
- it != m_caches.end(); it++) {
- (*it).second->printConfig(out);
- }
- DirectoryMemory::printGlobalConfig(out);
- for (map<string, DirectoryMemory*>::const_iterator it = m_directories.begin();
- it != m_directories.end(); it++) {
- (*it).second->printConfig(out);
- }
- for (map<string, Sequencer*>::const_iterator it = m_sequencers.begin();
- it != m_sequencers.end(); it++) {
- (*it).second->printConfig(out);
- }
-
m_network_ptr->printConfig(out);
m_profiler_ptr->printConfig(out);
-
out << "\n================ End RubySystem Configuration Print ================\n\n";
}
@@ -181,32 +141,12 @@ void RubySystem::printStats(ostream& out)
m_profiler_ptr->printStats(out);
m_network_ptr->printStats(out);
- for (map<string, Sequencer*>::const_iterator it = m_sequencers.begin();
- it != m_sequencers.end(); it++) {
- (*it).second->printStats(out);
- }
- for (map<string, CacheMemory*>::const_iterator it = m_caches.begin();
- it != m_caches.end(); it++) {
- (*it).second->printStats(out);
- }
- for (map<string, AbstractController*>::const_iterator it = m_controllers.begin();
- it != m_controllers.end(); it++) {
- (*it).second->printStats(out);
- }
}
void RubySystem::clearStats() const
{
m_profiler_ptr->clearStats();
m_network_ptr->clearStats();
- for (map<string, CacheMemory*>::const_iterator it = m_caches.begin();
- it != m_caches.end(); it++) {
- (*it).second->clearStats();
- }
- for (map<string, AbstractController*>::const_iterator it = m_controllers.begin();
- it != m_controllers.end(); it++) {
- (*it).second->clearStats();
- }
}
void RubySystem::recordCacheContents(CacheRecorder& tr) const
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index 02676f4c7..6a6b0165e 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -45,7 +45,6 @@
#include "mem/ruby/common/Global.hh"
#include "mem/gems_common/Vector.hh"
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
-#include <map>
#include "sim/sim_object.hh"
#include "params/RubySystem.hh"
#include "base/callback.hh"
@@ -54,15 +53,7 @@ class Profiler;
class Network;
class CacheRecorder;
class Tracer;
-class Sequencer;
-class DMASequencer;
class MemoryVector;
-class AbstractController;
-class MessageBuffer;
-class CacheMemory;
-class DirectoryMemory;
-class Topology;
-class MemoryControl;
/*
* This defines the number of longs (32-bits on 32 bit machines,
@@ -77,16 +68,6 @@ class MemoryControl;
*/
const int NUMBER_WORDS_PER_SET = 4;
-
-struct RubyObjConf {
- string type;
- string name;
- vector<string> argv;
- RubyObjConf(string _type, string _name, vector<string> _argv)
- : type(_type), name(_name), argv(_argv)
- {}
-};
-
class RubySystem : public SimObject {
public:
typedef RubySystemParams Params;
@@ -103,27 +84,8 @@ public:
static int getMemorySizeBits() { return m_memory_size_bits; }
// Public Methods
- static RubyPort* getPortOnly(const string & name) {
- assert(m_ports.count(name) == 1); return m_ports[name]; }
- static RubyPort* getPort(const string & name, void (*hit_callback)(int64_t)) {
- if (m_ports.count(name) != 1){
- cerr << "Port " << name << " has " << m_ports.count(name) << " instances" << endl;
- }
- assert(m_ports.count(name) == 1);
- m_ports[name]->registerHitCallback(hit_callback);
- return m_ports[name];
- }
static Network* getNetwork() { assert(m_network_ptr != NULL); return m_network_ptr; }
- static Topology* getTopology(const string & name) { assert(m_topologies.count(name) == 1); return m_topologies[name]; }
- static CacheMemory* getCache(const string & name) { assert(m_caches.count(name) == 1); return m_caches[name]; }
- static DirectoryMemory* getDirectory(const string & name) { assert(m_directories.count(name) == 1); return m_directories[name]; }
- static MemoryControl* getMemoryControl(const string & name) { assert(m_memorycontrols.count(name) == 1); return m_memorycontrols[name]; }
- static Sequencer* getSequencer(const string & name) { assert(m_sequencers.count(name) == 1); return m_sequencers[name]; }
- static DMASequencer* getDMASequencer(const string & name) { assert(m_dma_sequencers.count(name) == 1); return m_dma_sequencers[name]; }
- static AbstractController* getController(const string & name) { assert(m_controllers.count(name) == 1); return m_controllers[name]; }
-
static RubyEventQueue* getEventQueue() { return g_eventQueue_ptr; }
-
Profiler* getProfiler() {assert(m_profiler_ptr != NULL); return m_profiler_ptr; }
static Tracer* getTracer() { assert(m_tracer_ptr != NULL); return m_tracer_ptr; }
static MemoryVector* getMemoryVector() { assert(m_mem_vec_ptr != NULL); return m_mem_vec_ptr;}
@@ -144,9 +106,6 @@ public:
*/
private:
- // Constructors
- RubySystem(const vector <RubyObjConf> & cfg_file);
-
// Private copy constructor and assignment operator
RubySystem(const RubySystem& obj);
RubySystem& operator=(const RubySystem& obj);
@@ -167,17 +126,6 @@ private:
// Data Members (m_ prefix)
static Network* m_network_ptr;
- static map< string, Topology* > m_topologies;
- static map< string, RubyPort* > m_ports;
- static map< string, CacheMemory* > m_caches;
- static map< string, DirectoryMemory* > m_directories;
- static map< string, Sequencer* > m_sequencers;
- static map< string, DMASequencer* > m_dma_sequencers;
- static map< string, AbstractController* > m_controllers;
- static map< string, MemoryControl* > m_memorycontrols;
-
- //added by SS
- //static map< string, Tracer* > m_tracers;
public:
static Profiler* m_profiler_ptr;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 02:03:31 +0000