diff options
Diffstat (limited to 'src/mem/ruby/system')
| -rw-r--r-- | src/mem/ruby/system/MemoryControl.hh | 2 | ||||
| -rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 30 | ||||
| -rw-r--r-- | src/mem/ruby/system/TimerTable.cc | 6 | ||||
| -rw-r--r-- | src/mem/ruby/system/TimerTable.hh | 13 |
4 files changed, 29 insertions, 22 deletions
diff --git a/src/mem/ruby/system/MemoryControl.hh b/src/mem/ruby/system/MemoryControl.hh index 5c6adb0ab..fb77eadb2 100644 --- a/src/mem/ruby/system/MemoryControl.hh +++ b/src/mem/ruby/system/MemoryControl.hh @@ -60,6 +60,8 @@ class MemoryControl : public ClockedObject, public Consumer virtual void setConsumer(Consumer* consumer_ptr) = 0; virtual Consumer* getConsumer() = 0; + virtual void setClockObj(ClockedObject* consumer_ptr) {} + virtual void setDescription(const std::string& name) = 0; virtual std::string getDescription() = 0; diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index a45dfc98d..9e3fd6864 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -88,7 +88,7 @@ Sequencer::wakeup() assert(getDrainState() != Drainable::Draining); // Check for deadlock of any of the requests - Time current_time = g_system_ptr->getTime(); + Time current_time = curCycle(); // Check across all outstanding requests int total_outstanding = 0; @@ -130,8 +130,7 @@ Sequencer::wakeup() if (m_outstanding_count > 0) { // If there are still outstanding requests, keep checking - schedule(deadlockCheckEvent, - g_system_ptr->clockPeriod() * m_deadlock_threshold + curTick()); + schedule(deadlockCheckEvent, clockEdge(m_deadlock_threshold)); } } @@ -211,8 +210,7 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type) // See if we should schedule a deadlock check if (!deadlockCheckEvent.scheduled() && getDrainState() != Drainable::Draining) { - schedule(deadlockCheckEvent, - g_system_ptr->clockPeriod() * m_deadlock_threshold + curTick()); + schedule(deadlockCheckEvent, clockEdge(m_deadlock_threshold)); } Address line_addr(pkt->getAddr()); @@ -242,8 +240,7 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type) m_writeRequestTable.insert(default_entry); if (r.second) { RequestTable::iterator i = r.first; - i->second = new SequencerRequest(pkt, request_type, - g_system_ptr->getTime()); + i->second = new SequencerRequest(pkt, request_type, curCycle()); m_outstanding_count++; } else { // There is an outstanding write request for the cache line @@ -263,8 +260,7 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type) if (r.second) { RequestTable::iterator i = r.first; - i->second = new SequencerRequest(pkt, request_type, - g_system_ptr->getTime()); + i->second = new SequencerRequest(pkt, request_type, curCycle()); m_outstanding_count++; } else { // There is an outstanding read request for the cache line @@ -480,8 +476,8 @@ Sequencer::hitCallback(SequencerRequest* srequest, m_dataCache_ptr->setMRU(request_line_address); } - assert(g_system_ptr->getTime() >= issued_time); - Time miss_latency = g_system_ptr->getTime() - issued_time; + assert(curCycle() >= issued_time); + Time miss_latency = curCycle() - issued_time; // Profile the miss latency for all non-zero demand misses if (miss_latency != 0) { @@ -489,18 +485,14 @@ Sequencer::hitCallback(SequencerRequest* srequest, if (mach == GenericMachineType_L1Cache_wCC) { g_system_ptr->getProfiler()->missLatencyWcc(issued_time, - initialRequestTime, - forwardRequestTime, - firstResponseTime, - g_system_ptr->getTime()); + initialRequestTime, forwardRequestTime, + firstResponseTime, curCycle()); } if (mach == GenericMachineType_Directory) { g_system_ptr->getProfiler()->missLatencyDir(issued_time, - initialRequestTime, - forwardRequestTime, - firstResponseTime, - g_system_ptr->getTime()); + initialRequestTime, forwardRequestTime, + firstResponseTime, curCycle()); } DPRINTFR(ProtocolTrace, "%15s %3s %10s%20s %6s>%-6s %s %d cycles\n", diff --git a/src/mem/ruby/system/TimerTable.cc b/src/mem/ruby/system/TimerTable.cc index 6702411a5..992401c50 100644 --- a/src/mem/ruby/system/TimerTable.cc +++ b/src/mem/ruby/system/TimerTable.cc @@ -33,6 +33,8 @@ TimerTable::TimerTable() { m_consumer_ptr = NULL; + m_clockobj_ptr = NULL; + m_next_valid = false; m_next_address = Address(0); m_next_time = 0; @@ -48,7 +50,7 @@ TimerTable::isReady() const updateNext(); } assert(m_next_valid); - return (g_system_ptr->getTime() >= m_next_time); + return (m_clockobj_ptr->curCycle() >= m_next_time); } const Address& @@ -69,7 +71,7 @@ TimerTable::set(const Address& address, Time relative_latency) assert(address == line_address(address)); assert(relative_latency > 0); assert(!m_map.count(address)); - Time ready_time = g_system_ptr->getTime() + relative_latency; + Time ready_time = m_clockobj_ptr->curCycle() + relative_latency; m_map[address] = ready_time; assert(m_consumer_ptr != NULL); m_consumer_ptr->scheduleEventAbsolute(ready_time); diff --git a/src/mem/ruby/system/TimerTable.hh b/src/mem/ruby/system/TimerTable.hh index 4335b6605..ecd95ee19 100644 --- a/src/mem/ruby/system/TimerTable.hh +++ b/src/mem/ruby/system/TimerTable.hh @@ -49,6 +49,12 @@ class TimerTable m_consumer_ptr = consumer_ptr; } + void setClockObj(ClockedObject* obj) + { + assert(m_clockobj_ptr == NULL); + m_clockobj_ptr = obj; + } + void setDescription(const std::string& name) { @@ -78,7 +84,12 @@ class TimerTable mutable bool m_next_valid; mutable Time m_next_time; // Only valid if m_next_valid is true mutable Address m_next_address; // Only valid if m_next_valid is true - Consumer* m_consumer_ptr; // Consumer to signal a wakeup() + + //! Object used for querying time. + ClockedObject* m_clockobj_ptr; + //! Consumer to signal a wakeup() + Consumer* m_consumer_ptr; + std::string m_name; }; |