diff options
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 49 | ||||
-rw-r--r-- | src/mem/ruby/system/Sequencer.hh | 19 |
2 files changed, 64 insertions, 4 deletions
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 175bb6721..74b6355e8 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -357,6 +357,17 @@ Sequencer::writeCallback(const Address& address, GenericMachineType mach, DataBlock& data) { + writeCallback(address, mach, data, 0, 0, 0); +} + +void +Sequencer::writeCallback(const Address& address, + GenericMachineType mach, + DataBlock& data, + Time initialRequestTime, + Time forwardRequestTime, + Time firstResponseTime) +{ assert(address == line_address(address)); assert(m_writeRequestTable.count(line_address(address))); @@ -385,7 +396,8 @@ Sequencer::writeCallback(const Address& address, m_controller->unblock(address); } - hitCallback(request, mach, data, success); + hitCallback(request, mach, data, success, + initialRequestTime, forwardRequestTime, firstResponseTime); } void @@ -399,6 +411,17 @@ Sequencer::readCallback(const Address& address, GenericMachineType mach, DataBlock& data) { + readCallback(address, mach, data, 0, 0, 0); +} + +void +Sequencer::readCallback(const Address& address, + GenericMachineType mach, + DataBlock& data, + Time initialRequestTime, + Time forwardRequestTime, + Time firstResponseTime) +{ assert(address == line_address(address)); assert(m_readRequestTable.count(line_address(address))); @@ -413,14 +436,18 @@ Sequencer::readCallback(const Address& address, (request->ruby_request.type == RubyRequestType_RMW_Read) || (request->ruby_request.type == RubyRequestType_IFETCH)); - hitCallback(request, mach, data, true); + hitCallback(request, mach, data, true, + initialRequestTime, forwardRequestTime, firstResponseTime); } void Sequencer::hitCallback(SequencerRequest* srequest, GenericMachineType mach, DataBlock& data, - bool success) + bool success, + Time initialRequestTime, + Time forwardRequestTime, + Time firstResponseTime) { const RubyRequest & ruby_request = srequest->ruby_request; Address request_address(ruby_request.paddr); @@ -445,6 +472,22 @@ Sequencer::hitCallback(SequencerRequest* srequest, if (miss_latency != 0) { g_system_ptr->getProfiler()->missLatency(miss_latency, type, mach); + if (mach == GenericMachineType_L1Cache_wCC) { + g_system_ptr->getProfiler()->missLatencyWcc(issued_time, + initialRequestTime, + forwardRequestTime, + firstResponseTime, + g_eventQueue_ptr->getTime()); + } + + if (mach == GenericMachineType_Directory) { + g_system_ptr->getProfiler()->missLatencyDir(issued_time, + initialRequestTime, + forwardRequestTime, + firstResponseTime, + g_eventQueue_ptr->getTime()); + } + if (Debug::getProtocolTrace()) { if (success) { g_system_ptr->getProfiler()-> diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh index fecfc9a1a..4ab85dac8 100644 --- a/src/mem/ruby/system/Sequencer.hh +++ b/src/mem/ruby/system/Sequencer.hh @@ -80,12 +80,26 @@ class Sequencer : public RubyPort, public Consumer GenericMachineType mach, DataBlock& data); + void writeCallback(const Address& address, + GenericMachineType mach, + DataBlock& data, + Time initialRequestTime, + Time forwardRequestTime, + Time firstResponseTime); + void readCallback(const Address& address, DataBlock& data); void readCallback(const Address& address, GenericMachineType mach, DataBlock& data); + void readCallback(const Address& address, + GenericMachineType mach, + DataBlock& data, + Time initialRequestTime, + Time forwardRequestTime, + Time firstResponseTime); + RequestStatus makeRequest(const RubyRequest & request); RequestStatus getRequestStatus(const RubyRequest& request); bool empty() const; @@ -106,7 +120,10 @@ class Sequencer : public RubyPort, public Consumer void hitCallback(SequencerRequest* request, GenericMachineType mach, DataBlock& data, - bool success); + bool success, + Time initialRequestTime, + Time forwardRequestTime, + Time firstResponseTime); bool insertRequest(SequencerRequest* request); |