7 files changed, 15 insertions, 17 deletions
diff --git a/src/mem/ruby/system/CacheMemory.cc b/src/mem/ruby/system/CacheMemory.cc
index 62aa1e25d..c9de85961 100644
--- a/src/mem/ruby/system/CacheMemory.cc
+++ b/src/mem/ruby/system/CacheMemory.cc
@@ -73,11 +73,11 @@ CacheMemory::init()
     else
         assert(false);
 
-    m_cache.setSize(m_cache_num_sets);
-    m_locked.setSize(m_cache_num_sets);
+    m_cache.resize(m_cache_num_sets);
+    m_locked.resize(m_cache_num_sets);
     for (int i = 0; i < m_cache_num_sets; i++) {
-        m_cache[i].setSize(m_cache_assoc);
-        m_locked[i].setSize(m_cache_assoc);
+        m_cache[i].resize(m_cache_assoc);
+        m_locked[i].resize(m_cache_assoc);
         for (int j = 0; j < m_cache_assoc; j++) {
             m_cache[i][j] = NULL;
             m_locked[i][j] = -1;
@@ -266,7 +266,7 @@ CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry)
 
     // Find the first open slot
     Index cacheSet = addressToCacheSet(address);
-    Vector<AbstractCacheEntry*> &set = m_cache[cacheSet];
+    std::vector<AbstractCacheEntry*> &set = m_cache[cacheSet];
     for (int i = 0; i < m_cache_assoc; i++) {
         if (!set[i] || set[i]->m_Permission == AccessPermission_NotPresent) {
             set[i] = entry;  // Init entry
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh
index 21756a606..f004b8310 100644
--- a/src/mem/ruby/system/CacheMemory.hh
+++ b/src/mem/ruby/system/CacheMemory.hh
@@ -34,7 +34,6 @@
 #include <vector>
 
 #include "base/hashmap.hh"
-#include "mem/gems_common/Vector.hh"
 #include "mem/protocol/AccessPermission.hh"
 #include "mem/protocol/CacheMsg.hh"
 #include "mem/protocol/CacheRequestType.hh"
@@ -153,8 +152,8 @@ class CacheMemory : public SimObject
     // The first index is the # of cache lines.
     // The second index is the the amount associativity.
     m5::hash_map<Address, int> m_tag_index;
-    Vector<Vector<AbstractCacheEntry*> > m_cache;
-    Vector<Vector<int> > m_locked;
+    std::vector<std::vector<AbstractCacheEntry*> > m_cache;
+    std::vector<std::vector<int> > m_locked;
 
     AbstractReplacementPolicy *m_replacementPolicy_ptr;
 
diff --git a/src/mem/ruby/system/MemoryVector.hh b/src/mem/ruby/system/MemoryVector.hh
index 15cea168d..6719b9fb6 100644
--- a/src/mem/ruby/system/MemoryVector.hh
+++ b/src/mem/ruby/system/MemoryVector.hh
@@ -44,7 +44,7 @@ class MemoryVector
     ~MemoryVector();
     friend class DirectoryMemory;
 
-    void setSize(uint32 size);  // destructive
+    void resize(uint32 size);  // destructive
 
     void write(const Address & paddr, uint8* data, int len);
     uint8* read(const Address & paddr, uint8* data, int len);
@@ -71,7 +71,7 @@ inline
 MemoryVector::MemoryVector(uint32 size)
     : m_page_offset_mask(4095)
 {
-    setSize(size);
+    resize(size);
 }
 
 inline
@@ -86,7 +86,7 @@ MemoryVector::~MemoryVector()
 }
 
 inline void
-MemoryVector::setSize(uint32 size)
+MemoryVector::resize(uint32 size)
 {
     if (m_pages != NULL){
         for (int i = 0; i < m_num_pages; i++) {
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 641c8fcb9..9ba150f11 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -92,7 +92,7 @@ Sequencer::wakeup()
     // Check across all outstanding requests
     int total_outstanding = 0;
 
-    Vector<Address> keys = m_readRequestTable.keys();
+    std::vector<Address> keys = m_readRequestTable.keys();
     for (int i = 0; i < keys.size(); i++) {
         SequencerRequest* request = m_readRequestTable.lookup(keys[i]);
         if (current_time - request->issue_time >= m_deadlock_threshold) {
@@ -160,7 +160,7 @@ Sequencer::printProgress(ostream& out) const
     out << "---------------" << endl;
     out << "outstanding requests" << endl;
 
-    Vector<Address> rkeys = m_readRequestTable.keys();
+    std::vector<Address> rkeys = m_readRequestTable.keys();
     int read_size = rkeys.size();
     out << "proc " << m_version << " Read Requests = " << read_size << endl;
 
@@ -174,7 +174,7 @@ Sequencer::printProgress(ostream& out) const
         total_demand++;
     }
 
-    Vector<Address> wkeys = m_writeRequestTable.keys();
+    std::vector<Address> wkeys = m_writeRequestTable.keys();
     int write_size = wkeys.size();
     out << "proc " << m_version << " Write Requests = " << write_size << endl;
 
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index d28d74a89..801b2a3e9 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -85,7 +85,7 @@ RubySystem::RubySystem(const Params *p)
         m_mem_vec_ptr = NULL;
     } else {
         m_mem_vec_ptr = new MemoryVector;
-        m_mem_vec_ptr->setSize(m_memory_size_bytes);
+        m_mem_vec_ptr->resize(m_memory_size_bytes);
     }
 
     //
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index f501c5a83..77b056faf 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -36,7 +36,6 @@
 #define __MEM_RUBY_SYSTEM_SYSTEM_HH__
 
 #include "base/callback.hh"
-#include "mem/gems_common/Vector.hh"
 #include "mem/ruby/common/Global.hh"
 #include "mem/ruby/eventqueue/RubyEventQueue.hh"
 #include "mem/ruby/system/RubyPort.hh"
diff --git a/src/mem/ruby/system/TimerTable.cc b/src/mem/ruby/system/TimerTable.cc
index c623677f3..1b5545c96 100644
--- a/src/mem/ruby/system/TimerTable.cc
+++ b/src/mem/ruby/system/TimerTable.cc
@@ -108,7 +108,7 @@ TimerTable::updateNext() const
         return;
     }
 
-    Vector<Address> addresses = m_map.keys();
+    std::vector<Address> addresses = m_map.keys();
     m_next_address = addresses[0];
     m_next_time = m_map.lookup(m_next_address);