diff options
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r-- | src/mem/ruby/system/CacheRecorder.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/DMASequencer.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/DMASequencer.hh | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/RubyPort.hh | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/RubySystem.cc (renamed from src/mem/ruby/system/System.cc) | 3 | ||||
-rw-r--r-- | src/mem/ruby/system/RubySystem.hh (renamed from src/mem/ruby/system/System.hh) | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/RubySystem.py | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/SConscript | 4 | ||||
-rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 2 |
9 files changed, 11 insertions, 10 deletions
diff --git a/src/mem/ruby/system/CacheRecorder.cc b/src/mem/ruby/system/CacheRecorder.cc index 339cf1b4f..78d6939fc 100644 --- a/src/mem/ruby/system/CacheRecorder.cc +++ b/src/mem/ruby/system/CacheRecorder.cc @@ -29,8 +29,8 @@ #include "debug/RubyCacheTrace.hh" #include "mem/ruby/system/CacheRecorder.hh" +#include "mem/ruby/system/RubySystem.hh" #include "mem/ruby/system/Sequencer.hh" -#include "mem/ruby/system/System.hh" using namespace std; diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc index e263fefdb..85b476cfd 100644 --- a/src/mem/ruby/system/DMASequencer.cc +++ b/src/mem/ruby/system/DMASequencer.cc @@ -34,7 +34,7 @@ #include "debug/RubyStats.hh" #include "mem/protocol/SequencerMsg.hh" #include "mem/ruby/system/DMASequencer.hh" -#include "mem/ruby/system/System.hh" +#include "mem/ruby/system/RubySystem.hh" #include "sim/system.hh" DMASequencer::DMASequencer(const Params *p) diff --git a/src/mem/ruby/system/DMASequencer.hh b/src/mem/ruby/system/DMASequencer.hh index 1539c3999..f9d1b630e 100644 --- a/src/mem/ruby/system/DMASequencer.hh +++ b/src/mem/ruby/system/DMASequencer.hh @@ -37,7 +37,7 @@ #include "mem/protocol/RequestStatus.hh" #include "mem/ruby/common/DataBlock.hh" #include "mem/ruby/network/MessageBuffer.hh" -#include "mem/ruby/system/System.hh" +#include "mem/ruby/system/RubySystem.hh" #include "mem/simple_mem.hh" #include "mem/tport.hh" #include "params/DMASequencer.hh" diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh index f2841e561..cbcc678d3 100644 --- a/src/mem/ruby/system/RubyPort.hh +++ b/src/mem/ruby/system/RubyPort.hh @@ -47,7 +47,7 @@ #include "mem/protocol/RequestStatus.hh" #include "mem/ruby/network/MessageBuffer.hh" -#include "mem/ruby/system/System.hh" +#include "mem/ruby/system/RubySystem.hh" #include "mem/mem_object.hh" #include "mem/tport.hh" #include "params/RubyPort.hh" diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/RubySystem.cc index 490a1f085..454775178 100644 --- a/src/mem/ruby/system/System.cc +++ b/src/mem/ruby/system/RubySystem.cc @@ -26,6 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include "mem/ruby/system/RubySystem.hh" + #include <fcntl.h> #include <zlib.h> @@ -38,7 +40,6 @@ #include "debug/RubySystem.hh" #include "mem/ruby/common/Address.hh" #include "mem/ruby/network/Network.hh" -#include "mem/ruby/system/System.hh" #include "mem/simple_mem.hh" #include "sim/eventq.hh" #include "sim/simulate.hh" diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/RubySystem.hh index c79732651..7026f6756 100644 --- a/src/mem/ruby/system/System.hh +++ b/src/mem/ruby/system/RubySystem.hh @@ -37,10 +37,10 @@ #include "base/callback.hh" #include "base/output.hh" +#include "mem/packet.hh" #include "mem/ruby/profiler/Profiler.hh" #include "mem/ruby/slicc_interface/AbstractController.hh" #include "mem/ruby/system/CacheRecorder.hh" -#include "mem/packet.hh" #include "params/RubySystem.hh" #include "sim/clocked_object.hh" diff --git a/src/mem/ruby/system/RubySystem.py b/src/mem/ruby/system/RubySystem.py index c10f8117f..5b13f2ea6 100644 --- a/src/mem/ruby/system/RubySystem.py +++ b/src/mem/ruby/system/RubySystem.py @@ -33,7 +33,7 @@ from SimpleMemory import * class RubySystem(ClockedObject): type = 'RubySystem' - cxx_header = "mem/ruby/system/System.hh" + cxx_header = "mem/ruby/system/RubySystem.hh" randomization = Param.Bool(False, "insert random delays on message enqueue times"); block_size_bytes = Param.UInt32(64, diff --git a/src/mem/ruby/system/SConscript b/src/mem/ruby/system/SConscript index 55fe11d39..8c5077362 100644 --- a/src/mem/ruby/system/SConscript +++ b/src/mem/ruby/system/SConscript @@ -33,12 +33,12 @@ Import('*') if env['PROTOCOL'] == 'None': Return() -SimObject('Sequencer.py') SimObject('RubySystem.py') +SimObject('Sequencer.py') Source('CacheRecorder.cc') Source('DMASequencer.cc') Source('RubyPort.cc') Source('RubyPortProxy.cc') +Source('RubySystem.cc') Source('Sequencer.cc') -Source('System.cc') diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 740db7d8d..8e41204b7 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -38,8 +38,8 @@ #include "mem/protocol/RubyAccessMode.hh" #include "mem/ruby/profiler/Profiler.hh" #include "mem/ruby/slicc_interface/RubyRequest.hh" +#include "mem/ruby/system/RubySystem.hh" #include "mem/ruby/system/Sequencer.hh" -#include "mem/ruby/system/System.hh" #include "mem/packet.hh" #include "sim/system.hh" |