diff options
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r-- | src/mem/ruby/system/CacheMemory.cc | 14 | ||||
-rw-r--r-- | src/mem/ruby/system/DirectoryMemory.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/SConscript | 3 | ||||
-rw-r--r-- | src/mem/ruby/system/SparseMemory.cc | 31 |
4 files changed, 21 insertions, 29 deletions
diff --git a/src/mem/ruby/system/CacheMemory.cc b/src/mem/ruby/system/CacheMemory.cc index 59f97e5fe..87baebd0c 100644 --- a/src/mem/ruby/system/CacheMemory.cc +++ b/src/mem/ruby/system/CacheMemory.cc @@ -166,7 +166,7 @@ CacheMemory::tryCacheAccess(const Address& address, CacheRequestType type, DataBlock*& data_ptr) { assert(address == line_address(address)); - DEBUG_EXPR(CACHE_COMP, HighPrio, address); + DPRINTF(RubyCache, "address: %s\n", address); Index cacheSet = addressToCacheSet(address); int loc = findTagInSet(cacheSet, address); if (loc != -1) { @@ -194,7 +194,7 @@ CacheMemory::testCacheAccess(const Address& address, CacheRequestType type, DataBlock*& data_ptr) { assert(address == line_address(address)); - DEBUG_EXPR(CACHE_COMP, HighPrio, address); + DPRINTF(RubyCache, "address: %s\n", address); Index cacheSet = addressToCacheSet(address); int loc = findTagInSet(cacheSet, address); @@ -223,12 +223,10 @@ CacheMemory::isTagPresent(const Address& address) const if (loc == -1) { // We didn't find the tag - DEBUG_EXPR(CACHE_COMP, LowPrio, address); - DEBUG_MSG(CACHE_COMP, LowPrio, "No tag match"); + DPRINTF(RubyCache, "No tag match for address: %s\n", address); return false; } - DEBUG_EXPR(CACHE_COMP, LowPrio, address); - DEBUG_MSG(CACHE_COMP, LowPrio, "found"); + DPRINTF(RubyCache, "address: %s found\n", address); return true; } @@ -263,7 +261,7 @@ CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry) assert(address == line_address(address)); assert(!isTagPresent(address)); assert(cacheAvail(address)); - DEBUG_EXPR(CACHE_COMP, HighPrio, address); + DPRINTF(RubyCache, "address: %s\n", address); // Find the first open slot Index cacheSet = addressToCacheSet(address); @@ -292,7 +290,7 @@ CacheMemory::deallocate(const Address& address) { assert(address == line_address(address)); assert(isTagPresent(address)); - DEBUG_EXPR(CACHE_COMP, HighPrio, address); + DPRINTF(RubyCache, "address: %s\n", address); Index cacheSet = addressToCacheSet(address); int loc = findTagInSet(cacheSet, address); if (loc != -1) { diff --git a/src/mem/ruby/system/DirectoryMemory.cc b/src/mem/ruby/system/DirectoryMemory.cc index fbb48d7f5..4a72dce33 100644 --- a/src/mem/ruby/system/DirectoryMemory.cc +++ b/src/mem/ruby/system/DirectoryMemory.cc @@ -157,7 +157,7 @@ DirectoryMemory::lookup(PhysAddress address) assert(isPresent(address)); Directory_Entry* entry; uint64 idx; - DEBUG_EXPR(CACHE_COMP, HighPrio, address); + DPRINTF(RubyCache, "address: %s\n", address); if (m_use_map) { if (m_sparseMemory->exist(address)) { diff --git a/src/mem/ruby/system/SConscript b/src/mem/ruby/system/SConscript index 6d1aff31d..edc9d451f 100644 --- a/src/mem/ruby/system/SConscript +++ b/src/mem/ruby/system/SConscript @@ -50,6 +50,3 @@ Source('RubyPort.cc') Source('Sequencer.cc', Werror=False) Source('System.cc') Source('TimerTable.cc') - -TraceFlag('RubyCache') -TraceFlag('RubyDma') diff --git a/src/mem/ruby/system/SparseMemory.cc b/src/mem/ruby/system/SparseMemory.cc index c4f636322..376852826 100644 --- a/src/mem/ruby/system/SparseMemory.cc +++ b/src/mem/ruby/system/SparseMemory.cc @@ -112,7 +112,7 @@ SparseMemory::exist(const Address& address) const int highBit = m_total_number_of_bits + RubySystem::getBlockSizeBits(); int lowBit; assert(address == line_address(address)); - DEBUG_EXPR(CACHE_COMP, HighPrio, address); + DPRINTF(RubyCache, "address: %s\n", address); for (int level = 0; level < m_number_of_levels; level++) { // Create the appropriate sub address for this level @@ -122,10 +122,9 @@ SparseMemory::exist(const Address& address) const lowBit = highBit - m_number_of_bits_per_level[level]; curAddress.setAddress(address.bitSelect(lowBit, highBit - 1)); - DEBUG_EXPR(CACHE_COMP, HighPrio, level); - DEBUG_EXPR(CACHE_COMP, HighPrio, lowBit); - DEBUG_EXPR(CACHE_COMP, HighPrio, highBit - 1); - DEBUG_EXPR(CACHE_COMP, HighPrio, curAddress); + DPRINTF(RubyCache, "level: %d, lowBit: %d, highBit - 1: %d, " + "curAddress: %s\n", + level, lowBit, highBit - 1, curAddress); // Adjust the highBit value for the next level highBit -= m_number_of_bits_per_level[level]; @@ -135,12 +134,12 @@ SparseMemory::exist(const Address& address) const if (curTable->count(curAddress) != 0) { curTable = (SparseMapType*)(((*curTable)[curAddress]).entry); } else { - DEBUG_MSG(CACHE_COMP, HighPrio, "Not found"); + DPRINTF(RubyCache, "Not found\n"); return false; } } - DEBUG_MSG(CACHE_COMP, HighPrio, "Entry found"); + DPRINTF(RubyCache, "Entry found\n"); return true; } @@ -224,11 +223,10 @@ SparseMemory::recursivelyRemoveLevels(const Address& address, curAddress.setAddress(address.bitSelect(curInfo.lowBit, curInfo.highBit - 1)); - DEBUG_EXPR(CACHE_COMP, HighPrio, address); - DEBUG_EXPR(CACHE_COMP, HighPrio, curInfo.level); - DEBUG_EXPR(CACHE_COMP, HighPrio, curInfo.lowBit); - DEBUG_EXPR(CACHE_COMP, HighPrio, curInfo.highBit - 1); - DEBUG_EXPR(CACHE_COMP, HighPrio, curAddress); + DPRINTF(RubyCache, "address: %s, curInfo.level: %d, curInfo.lowBit: %d, " + "curInfo.highBit - 1: %d, curAddress: %s\n", + address, curInfo.level, curInfo.lowBit, + curInfo.highBit - 1, curAddress); assert(curInfo.curTable->count(curAddress) != 0); @@ -307,7 +305,7 @@ SparseMemory::lookup(const Address& address) assert(exist(address)); assert(address == line_address(address)); - DEBUG_EXPR(CACHE_COMP, HighPrio, address); + DPRINTF(RubyCache, "address: %s\n", address); Address curAddress; SparseMapType* curTable = m_map_head; @@ -327,10 +325,9 @@ SparseMemory::lookup(const Address& address) lowBit = highBit - m_number_of_bits_per_level[level]; curAddress.setAddress(address.bitSelect(lowBit, highBit - 1)); - DEBUG_EXPR(CACHE_COMP, HighPrio, level); - DEBUG_EXPR(CACHE_COMP, HighPrio, lowBit); - DEBUG_EXPR(CACHE_COMP, HighPrio, highBit - 1); - DEBUG_EXPR(CACHE_COMP, HighPrio, curAddress); + DPRINTF(RubyCache, "level: %d, lowBit: %d, highBit - 1: %d, " + "curAddress: %s\n", + level, lowBit, highBit - 1, curAddress); // Adjust the highBit value for the next level highBit -= m_number_of_bits_per_level[level]; |