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-rw-r--r--src/mem/ruby/system/DMASequencer.cc13
-rw-r--r--src/mem/ruby/system/DMASequencer.hh5
-rw-r--r--src/mem/ruby/system/RubyPort.cc46
-rw-r--r--src/mem/ruby/system/RubyPort.hh4
-rw-r--r--src/mem/ruby/system/Sequencer.cc9
-rw-r--r--src/mem/ruby/system/Sequencer.py4
-rw-r--r--src/mem/ruby/system/System.cc10
-rw-r--r--src/mem/ruby/system/System.hh11
8 files changed, 53 insertions, 49 deletions
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc
index 646601ad4..7f12fda4c 100644
--- a/src/mem/ruby/system/DMASequencer.cc
+++ b/src/mem/ruby/system/DMASequencer.cc
@@ -38,8 +38,9 @@
#include "sim/system.hh"
DMASequencer::DMASequencer(const Params *p)
- : MemObject(p), m_version(p->version), m_controller(NULL),
- m_mandatory_q_ptr(NULL), m_usingRubyTester(p->using_ruby_tester),
+ : MemObject(p), m_ruby_system(p->ruby_system), m_version(p->version),
+ m_controller(NULL), m_mandatory_q_ptr(NULL),
+ m_usingRubyTester(p->using_ruby_tester),
slave_port(csprintf("%s.slave", name()), this, 0, p->ruby_system,
p->ruby_system->getAccessBackingStore()),
system(p->system), retry(false)
@@ -77,7 +78,7 @@ DMASequencer::MemSlavePort::MemSlavePort(const std::string &_name,
DMASequencer *_port, PortID id, RubySystem* _ruby_system,
bool _access_backing_store)
: QueuedSlavePort(_name, _port, queue, id), queue(*_port, *this),
- ruby_system(_ruby_system), access_backing_store(_access_backing_store)
+ m_ruby_system(_ruby_system), access_backing_store(_access_backing_store)
{
DPRINTF(RubyDma, "Created slave memport on ruby sequencer %s\n", _name);
}
@@ -190,7 +191,7 @@ DMASequencer::MemSlavePort::hitCallback(PacketPtr pkt)
// turn packet around to go back to requester if response expected
if (access_backing_store) {
- ruby_system->getPhysMem()->access(pkt);
+ m_ruby_system->getPhysMem()->access(pkt);
} else if (needsResponse) {
pkt->makeResponse();
}
@@ -198,7 +199,9 @@ DMASequencer::MemSlavePort::hitCallback(PacketPtr pkt)
if (needsResponse) {
DPRINTF(RubyDma, "Sending packet back over port\n");
// send next cycle
- schedTimingResp(pkt, curTick() + g_system_ptr->clockPeriod());
+ DMASequencer *seq = static_cast<DMASequencer *>(&owner);
+ RubySystem *rs = seq->m_ruby_system;
+ schedTimingResp(pkt, curTick() + rs->clockPeriod());
} else {
delete pkt;
}
diff --git a/src/mem/ruby/system/DMASequencer.hh b/src/mem/ruby/system/DMASequencer.hh
index ee5a4b698..ee7d578e0 100644
--- a/src/mem/ruby/system/DMASequencer.hh
+++ b/src/mem/ruby/system/DMASequencer.hh
@@ -32,12 +32,12 @@
#include <memory>
#include <ostream>
+#include "mem/mem_object.hh"
#include "mem/protocol/DMASequencerRequestType.hh"
#include "mem/protocol/RequestStatus.hh"
#include "mem/ruby/common/DataBlock.hh"
#include "mem/ruby/network/MessageBuffer.hh"
#include "mem/ruby/system/System.hh"
-#include "mem/mem_object.hh"
#include "mem/simple_mem.hh"
#include "mem/tport.hh"
#include "params/DMASequencer.hh"
@@ -61,13 +61,14 @@ class DMASequencer : public MemObject
typedef DMASequencerParams Params;
DMASequencer(const Params *);
void init();
+ RubySystem *m_ruby_system;
public:
class MemSlavePort : public QueuedSlavePort
{
private:
RespPacketQueue queue;
- RubySystem* ruby_system;
+ RubySystem* m_ruby_system;
bool access_backing_store;
public:
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 94f0c0966..2974d07a4 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -51,14 +51,14 @@
#include "sim/system.hh"
RubyPort::RubyPort(const Params *p)
- : MemObject(p), m_version(p->version), m_controller(NULL),
- m_mandatory_q_ptr(NULL), m_usingRubyTester(p->using_ruby_tester),
- system(p->system),
+ : MemObject(p), m_ruby_system(p->ruby_system), m_version(p->version),
+ m_controller(NULL), m_mandatory_q_ptr(NULL),
+ m_usingRubyTester(p->using_ruby_tester), system(p->system),
pioMasterPort(csprintf("%s.pio-master-port", name()), this),
pioSlavePort(csprintf("%s.pio-slave-port", name()), this),
memMasterPort(csprintf("%s.mem-master-port", name()), this),
memSlavePort(csprintf("%s-mem-slave-port", name()), this,
- p->ruby_system, p->ruby_system->getAccessBackingStore(), -1),
+ p->ruby_system->getAccessBackingStore(), -1),
gotAddrRanges(p->port_master_connection_count)
{
assert(m_version != -1);
@@ -66,8 +66,7 @@ RubyPort::RubyPort(const Params *p)
// create the slave ports based on the number of connected ports
for (size_t i = 0; i < p->port_slave_connection_count; ++i) {
slave_ports.push_back(new MemSlavePort(csprintf("%s.slave%d", name(),
- i), this, p->ruby_system,
- p->ruby_system->getAccessBackingStore(), i));
+ i), this, p->ruby_system->getAccessBackingStore(), i));
}
// create the master ports based on the number of connected ports
@@ -158,10 +157,9 @@ RubyPort::MemMasterPort::MemMasterPort(const std::string &_name,
}
RubyPort::MemSlavePort::MemSlavePort(const std::string &_name, RubyPort *_port,
- RubySystem *_system,
bool _access_backing_store, PortID id)
: QueuedSlavePort(_name, _port, queue, id), queue(*_port, *this),
- ruby_system(_system), access_backing_store(_access_backing_store)
+ access_backing_store(_access_backing_store)
{
DPRINTF(RubyPort, "Created slave memport on ruby sequencer %s\n", _name);
}
@@ -169,12 +167,12 @@ RubyPort::MemSlavePort::MemSlavePort(const std::string &_name, RubyPort *_port,
bool
RubyPort::PioMasterPort::recvTimingResp(PacketPtr pkt)
{
- RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
+ RubyPort *rp = static_cast<RubyPort *>(&owner);
DPRINTF(RubyPort, "Response for address: 0x%#x\n", pkt->getAddr());
// send next cycle
- ruby_port->pioSlavePort.schedTimingResp(
- pkt, curTick() + g_system_ptr->clockPeriod());
+ rp->pioSlavePort.schedTimingResp(
+ pkt, curTick() + rp->m_ruby_system->clockPeriod());
return true;
}
@@ -196,7 +194,8 @@ bool RubyPort::MemMasterPort::recvTimingResp(PacketPtr pkt)
pkt->getAddr(), port->name());
// attempt to send the response in the next cycle
- port->schedTimingResp(pkt, curTick() + g_system_ptr->clockPeriod());
+ RubyPort *rp = static_cast<RubyPort *>(&owner);
+ port->schedTimingResp(pkt, curTick() + rp->m_ruby_system->clockPeriod());
return true;
}
@@ -244,8 +243,9 @@ RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt)
pkt->pushSenderState(new SenderState(this));
// send next cycle
+ RubySystem *rs = ruby_port->m_ruby_system;
ruby_port->memMasterPort.schedTimingReq(pkt,
- curTick() + g_system_ptr->clockPeriod());
+ curTick() + rs->clockPeriod());
return true;
}
@@ -269,7 +269,7 @@ RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt)
}
//
- // Unless one is using the ruby tester, record the stalled M5 port for
+ // Unless one is using the ruby tester, record the stalled M5 port for
// later retry when the sequencer becomes free.
//
if (!ruby_port->m_usingRubyTester) {
@@ -287,11 +287,13 @@ RubyPort::MemSlavePort::recvFunctional(PacketPtr pkt)
{
DPRINTF(RubyPort, "Functional access for address: %#x\n", pkt->getAddr());
+ RubyPort *rp M5_VAR_USED = static_cast<RubyPort *>(&owner);
+ RubySystem *rs = rp->m_ruby_system;
+
// Check for pio requests and directly send them to the dedicated
// pio port.
if (!isPhysMemAddress(pkt->getAddr())) {
- RubyPort *ruby_port M5_VAR_USED = static_cast<RubyPort *>(&owner);
- assert(ruby_port->memMasterPort.isConnected());
+ assert(rp->memMasterPort.isConnected());
DPRINTF(RubyPort, "Pio Request for address: 0x%#x\n", pkt->getAddr());
panic("RubyPort::PioMasterPort::recvFunctional() not implemented!\n");
}
@@ -305,16 +307,16 @@ RubyPort::MemSlavePort::recvFunctional(PacketPtr pkt)
// The following command performs the real functional access.
// This line should be removed once Ruby supplies the official version
// of data.
- ruby_system->getPhysMem()->functionalAccess(pkt);
+ rs->getPhysMem()->functionalAccess(pkt);
} else {
bool accessSucceeded = false;
bool needsResponse = pkt->needsResponse();
// Do the functional access on ruby memory
if (pkt->isRead()) {
- accessSucceeded = ruby_system->functionalRead(pkt);
+ accessSucceeded = rs->functionalRead(pkt);
} else if (pkt->isWrite()) {
- accessSucceeded = ruby_system->functionalWrite(pkt);
+ accessSucceeded = rs->functionalWrite(pkt);
} else {
panic("Unsupported functional command %s\n", pkt->cmdString());
}
@@ -456,8 +458,10 @@ RubyPort::MemSlavePort::hitCallback(PacketPtr pkt)
DPRINTF(RubyPort, "Hit callback needs response %d\n", needsResponse);
+ RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
+ RubySystem *rs = ruby_port->m_ruby_system;
if (accessPhysMem) {
- ruby_system->getPhysMem()->access(pkt);
+ rs->getPhysMem()->access(pkt);
} else if (needsResponse) {
pkt->makeResponse();
}
@@ -466,7 +470,7 @@ RubyPort::MemSlavePort::hitCallback(PacketPtr pkt)
if (needsResponse) {
DPRINTF(RubyPort, "Sending packet back over port\n");
// send next cycle
- schedTimingResp(pkt, curTick() + g_system_ptr->clockPeriod());
+ schedTimingResp(pkt, curTick() + rs->clockPeriod());
} else {
delete pkt;
}
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index 1fbaeba7b..07fca5916 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -75,12 +75,11 @@ class RubyPort : public MemObject
{
private:
RespPacketQueue queue;
- RubySystem* ruby_system;
bool access_backing_store;
public:
MemSlavePort(const std::string &_name, RubyPort *_port,
- RubySystem*_system, bool _access_backing_store, PortID id);
+ bool _access_backing_store, PortID id);
void hitCallback(PacketPtr pkt);
void evictionCallback(const Address& address);
@@ -179,6 +178,7 @@ class RubyPort : public MemObject
*/
bool recvTimingResp(PacketPtr pkt, PortID master_port_id);
+ RubySystem *m_ruby_system;
uint32_t m_version;
AbstractController* m_controller;
MessageBuffer* m_mandatory_q_ptr;
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index a5e26b800..f64e24fdd 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -160,7 +160,7 @@ Sequencer::printProgress(ostream& out) const
#if 0
int total_demand = 0;
out << "Sequencer Stats Version " << m_version << endl;
- out << "Current time = " << g_system_ptr->getTime() << endl;
+ out << "Current time = " << m_ruby_system->getTime() << endl;
out << "---------------" << endl;
out << "outstanding requests" << endl;
@@ -557,14 +557,15 @@ Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data,
delete srequest;
+ RubySystem *rs = m_ruby_system;
if (RubySystem::getWarmupEnabled()) {
assert(pkt->req);
delete pkt->req;
delete pkt;
- g_system_ptr->m_cache_recorder->enqueueNextFetchRequest();
+ rs->m_cache_recorder->enqueueNextFetchRequest();
} else if (RubySystem::getCooldownEnabled()) {
delete pkt;
- g_system_ptr->m_cache_recorder->enqueueNextFlushRequest();
+ rs->m_cache_recorder->enqueueNextFlushRequest();
} else {
ruby_hit_callback(pkt);
}
@@ -737,7 +738,7 @@ void
Sequencer::checkCoherence(const Address& addr)
{
#ifdef CHECK_COHERENCE
- g_system_ptr->checkGlobalCoherenceInvariant(addr);
+ m_ruby_system->checkGlobalCoherenceInvariant(addr);
#endif
}
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py
index aac054221..e545000cf 100644
--- a/src/mem/ruby/system/Sequencer.py
+++ b/src/mem/ruby/system/Sequencer.py
@@ -45,7 +45,7 @@ class RubyPort(MemObject):
mem_slave_port = SlavePort("Ruby memory port")
using_ruby_tester = Param.Bool(False, "")
- ruby_system = Param.RubySystem("")
+ ruby_system = Param.RubySystem(Parent.any, "")
system = Param.System(Parent.any, "system object")
support_data_reqs = Param.Bool(True, "data cache requests supported")
support_inst_reqs = Param.Bool(True, "inst cache requests supported")
@@ -53,7 +53,7 @@ class RubyPort(MemObject):
class RubyPortProxy(RubyPort):
type = 'RubyPortProxy'
cxx_header = "mem/ruby/system/RubyPortProxy.hh"
-
+
class RubySequencer(RubyPort):
type = 'RubySequencer'
cxx_class = 'Sequencer'
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index 1cdc3879e..128d16003 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -58,9 +58,6 @@ bool RubySystem::m_cooldown_enabled = false;
RubySystem::RubySystem(const Params *p)
: ClockedObject(p), m_access_backing_store(p->access_backing_store)
{
- if (g_system_ptr != NULL)
- fatal("Only one RubySystem object currently allowed.\n");
-
m_random_seed = p->random_seed;
srandom(m_random_seed);
m_randomization = p->randomization;
@@ -70,9 +67,6 @@ RubySystem::RubySystem(const Params *p)
m_block_size_bits = floorLog2(m_block_size_bytes);
m_memory_size_bits = p->memory_size_bits;
- // Setup the global variables used in Ruby
- g_system_ptr = this;
-
// Resize to the size of different machine types
g_abs_controls.resize(MachineType_NUM);
@@ -329,9 +323,9 @@ void
RubySystem::RubyEvent::process()
{
if (RubySystem::getWarmupEnabled()) {
- ruby_system->m_cache_recorder->enqueueNextFetchRequest();
+ m_ruby_system->m_cache_recorder->enqueueNextFetchRequest();
} else if (RubySystem::getCooldownEnabled()) {
- ruby_system->m_cache_recorder->enqueueNextFlushRequest();
+ m_ruby_system->m_cache_recorder->enqueueNextFlushRequest();
}
}
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index 0030b5033..57a1b7cfb 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -54,12 +54,12 @@ class RubySystem : public ClockedObject
public:
RubyEvent(RubySystem* _ruby_system)
{
- ruby_system = _ruby_system;
+ m_ruby_system = _ruby_system;
}
private:
void process();
- RubySystem* ruby_system;
+ RubySystem* m_ruby_system;
};
friend class RubyEvent;
@@ -128,6 +128,7 @@ class RubySystem : public ClockedObject
static uint32_t m_block_size_bytes;
static uint32_t m_block_size_bits;
static uint32_t m_memory_size_bits;
+
static bool m_warmup_enabled;
static unsigned m_systems_to_warmup;
static bool m_cooldown_enabled;
@@ -146,12 +147,12 @@ class RubySystem : public ClockedObject
class RubyStatsCallback : public Callback
{
private:
- RubySystem *ruby_system;
+ RubySystem *m_ruby_system;
public:
virtual ~RubyStatsCallback() {}
- RubyStatsCallback(RubySystem *system) : ruby_system(system) {}
- void process() { ruby_system->collateStats(); }
+ RubyStatsCallback(RubySystem *system) : m_ruby_system(system) {}
+ void process() { m_ruby_system->collateStats(); }
};
#endif // __MEM_RUBY_SYSTEM_SYSTEM_HH__
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 04:44:20 +0000