4 files changed, 6 insertions, 7 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 795b473c7..ff3bbe8f0 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -52,7 +52,7 @@
 #include "sim/system.hh"
 
 RubyPort::RubyPort(const Params *p)
-    : MemObject(p), m_ruby_system(p->ruby_system), m_version(p->version),
+    : ClockedObject(p), m_ruby_system(p->ruby_system), m_version(p->version),
       m_controller(NULL), m_mandatory_q_ptr(NULL),
       m_usingRubyTester(p->using_ruby_tester), system(p->system),
       pioMasterPort(csprintf("%s.pio-master-port", name()), this),
@@ -117,7 +117,7 @@ RubyPort::getPort(const std::string &if_name, PortID idx)
     }
 
     // pass it along to our super class
-    return MemObject::getPort(if_name, idx);
+    return ClockedObject::getPort(if_name, idx);
 }
 
 RubyPort::PioMasterPort::PioMasterPort(const std::string &_name,
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index 922b3a973..20bc03a07 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -49,13 +49,13 @@
 #include "mem/ruby/common/MachineID.hh"
 #include "mem/ruby/network/MessageBuffer.hh"
 #include "mem/ruby/system/RubySystem.hh"
-#include "mem/mem_object.hh"
 #include "mem/tport.hh"
 #include "params/RubyPort.hh"
+#include "sim/clocked_object.hh"
 
 class AbstractController;
 
-class RubyPort : public MemObject
+class RubyPort : public ClockedObject
 {
   public:
     class MemMasterPort : public QueuedMasterPort
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py
index 35460438c..2aede349d 100644
--- a/src/mem/ruby/system/Sequencer.py
+++ b/src/mem/ruby/system/Sequencer.py
@@ -29,9 +29,9 @@
 
 from m5.params import *
 from m5.proxy import *
-from m5.objects.MemObject import MemObject
+from m5.objects.ClockedObject import ClockedObject
 
-class RubyPort(MemObject):
+class RubyPort(ClockedObject):
    type = 'RubyPort'
    abstract = True
    cxx_header = "mem/ruby/system/RubyPort.hh"
diff --git a/src/mem/ruby/system/WeightedLRUReplacementPolicy.py b/src/mem/ruby/system/WeightedLRUReplacementPolicy.py
index 77ee60554..fa50c95dc 100644
--- a/src/mem/ruby/system/WeightedLRUReplacementPolicy.py
+++ b/src/mem/ruby/system/WeightedLRUReplacementPolicy.py
@@ -33,7 +33,6 @@
 
 from m5.params import *
 from m5.proxy import *
-from m5.objects.MemObject import MemObject
 from m5.objects.ReplacementPolicy import ReplacementPolicy
 
 class WeightedLRUReplacementPolicy(ReplacementPolicy):