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-rw-r--r--src/mem/ruby/system/Cache.py1
-rw-r--r--src/mem/ruby/system/CacheMemory.cc5
-rw-r--r--src/mem/ruby/system/CacheMemory.hh1
3 files changed, 5 insertions, 2 deletions
diff --git a/src/mem/ruby/system/Cache.py b/src/mem/ruby/system/Cache.py
index 06952afd1..ab3ec4b29 100644
--- a/src/mem/ruby/system/Cache.py
+++ b/src/mem/ruby/system/Cache.py
@@ -38,3 +38,4 @@ class RubyCache(SimObject):
latency = Param.Int("");
assoc = Param.Int("");
replacement_policy = Param.String("PSEUDO_LRU", "");
+ start_index_bit = Param.Int(6, "index start, default 6 for 64-byte line");
diff --git a/src/mem/ruby/system/CacheMemory.cc b/src/mem/ruby/system/CacheMemory.cc
index 604113238..59f97e5fe 100644
--- a/src/mem/ruby/system/CacheMemory.cc
+++ b/src/mem/ruby/system/CacheMemory.cc
@@ -53,6 +53,7 @@ CacheMemory::CacheMemory(const Params *p)
m_cache_assoc = p->assoc;
m_policy = p->replacement_policy;
m_profiler_ptr = new CacheProfiler(name());
+ m_start_index_bit = p->start_index_bit;
}
void
@@ -127,8 +128,8 @@ Index
CacheMemory::addressToCacheSet(const Address& address) const
{
assert(address == line_address(address));
- return address.bitSelect(RubySystem::getBlockSizeBits(),
- RubySystem::getBlockSizeBits() + m_cache_num_set_bits - 1);
+ return address.bitSelect(m_start_index_bit,
+ m_start_index_bit + m_cache_num_set_bits - 1);
}
// Given a cache index: returns the index of the tag in a set.
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh
index c1d49f784..3ef951821 100644
--- a/src/mem/ruby/system/CacheMemory.hh
+++ b/src/mem/ruby/system/CacheMemory.hh
@@ -169,6 +169,7 @@ class CacheMemory : public SimObject
int m_cache_num_sets;
int m_cache_num_set_bits;
int m_cache_assoc;
+ int m_start_index_bit;
};
#endif // __MEM_RUBY_SYSTEM_CACHEMEMORY_HH__