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-rw-r--r--src/mem/ruby/system/RubyPort.cc32
-rw-r--r--src/mem/ruby/system/RubyPort.hh4
-rw-r--r--src/mem/ruby/system/RubyPortProxy.cc70
-rw-r--r--src/mem/ruby/system/RubyPortProxy.hh114
-rw-r--r--src/mem/ruby/system/SConscript1
-rw-r--r--src/mem/ruby/system/Sequencer.cc6
-rw-r--r--src/mem/ruby/system/Sequencer.hh2
-rw-r--r--src/mem/ruby/system/Sequencer.py3
8 files changed, 217 insertions, 15 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 64faf6aed..b60ca2a07 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2009 Advanced Micro Devices, Inc.
+ * Copyright (c) 2011 Mark D. Hill and David A. Wood
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -93,14 +94,6 @@ RubyPort::getPort(const std::string &if_name, int idx)
return physMemPort;
}
- if (if_name == "functional") {
- // Calls for the functional port only want to access
- // functional memory. Therefore, directly pass these calls
- // ports to physmem.
- assert(physmem != NULL);
- return physmem->getPort(if_name, idx);
- }
-
return NULL;
}
@@ -464,8 +457,11 @@ RubyPort::M5Port::recvFunctional(PacketPtr pkt)
// turn packet around to go back to requester if response expected
if (needsResponse) {
pkt->setFunctionalResponseStatus(accessSucceeded);
- DPRINTF(RubyPort, "Sending packet back over port\n");
- sendFunctional(pkt);
+
+ // @todo There should not be a reverse call since the response is
+ // communicated through the packet pointer
+ // DPRINTF(RubyPort, "Sending packet back over port\n");
+ // sendFunctional(pkt);
}
DPRINTF(RubyPort, "Functional access %s!\n",
accessSucceeded ? "successful":"failed");
@@ -668,9 +664,8 @@ RubyPort::PioPort::sendTiming(PacketPtr pkt)
bool
RubyPort::M5Port::isPhysMemAddress(Addr addr)
{
- AddrRangeList physMemAddrList;
- bool snoop = false;
- ruby_port->physMemPort->getPeerAddressRanges(physMemAddrList, snoop);
+ AddrRangeList physMemAddrList =
+ ruby_port->physMemPort->getPeer()->getAddrRanges();
for (AddrRangeIter iter = physMemAddrList.begin();
iter != physMemAddrList.end();
iter++) {
@@ -688,3 +683,14 @@ RubyPort::M5Port::deviceBlockSize() const
{
return (unsigned) RubySystem::getBlockSizeBytes();
}
+
+void
+RubyPort::ruby_eviction_callback(const Address& address)
+{
+ DPRINTF(RubyPort, "Sending invalidations.\n");
+ Request req(address.getAddress(), 0, 0);
+ for (CpuPortIter it = cpu_ports.begin(); it != cpu_ports.end(); it++) {
+ Packet *pkt = new Packet(&req, MemCmd::InvalidationReq, -1);
+ (*it)->sendTiming(pkt);
+ }
+}
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index d8dbe0cda..2ffdef3d9 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2009 Advanced Micro Devices, Inc.
+ * Copyright (c) 2011 Mark D. Hill and David A. Wood
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -58,6 +59,7 @@ class RubyPort : public MemObject
RubySystem*_system, bool _access_phys_mem);
bool sendTiming(PacketPtr pkt);
void hitCallback(PacketPtr pkt);
+ void evictionCallback(const Address& address);
unsigned deviceBlockSize() const;
bool onRetryList()
@@ -129,8 +131,8 @@ class RubyPort : public MemObject
protected:
const std::string m_name;
void ruby_hit_callback(PacketPtr pkt);
- void hit(PacketPtr pkt);
void testDrainComplete();
+ void ruby_eviction_callback(const Address& address);
int m_version;
AbstractController* m_controller;
diff --git a/src/mem/ruby/system/RubyPortProxy.cc b/src/mem/ruby/system/RubyPortProxy.cc
new file mode 100644
index 000000000..29a693ca6
--- /dev/null
+++ b/src/mem/ruby/system/RubyPortProxy.cc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2011 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Hansson
+ */
+
+#include "mem/ruby/system/RubyPortProxy.hh"
+
+RubyPortProxy::RubyPortProxy(const RubyPortProxyParams* p) :
+ RubyPort(p) {
+}
+
+RubyPortProxy::~RubyPortProxy()
+{
+}
+
+void
+RubyPortProxy::init()
+{
+ // Merely override to not care about the m_controller being NULL
+}
+
+RequestStatus
+RubyPortProxy::makeRequest(PacketPtr pkt)
+{
+ // This sequencer should only be used through the functional
+ // accesses made by the system port and so simply fail if this
+ // happens.
+ panic("RubyPortProxy::makeRequest should not be called");
+ return RequestStatus_NULL;
+}
+
+RubyPortProxy*
+RubyPortProxyParams::create()
+{
+ return new RubyPortProxy(this);
+}
diff --git a/src/mem/ruby/system/RubyPortProxy.hh b/src/mem/ruby/system/RubyPortProxy.hh
new file mode 100644
index 000000000..8f88541e5
--- /dev/null
+++ b/src/mem/ruby/system/RubyPortProxy.hh
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2011 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Hansson
+ */
+
+/**
+ * @file
+ * RobyPortProxy for connecting system port to Ruby
+ *
+ * A trivial wrapper that allows the system port to connect to Ruby
+ * and use nothing but functional accesses.
+ */
+
+#ifndef __MEM_RUBY_SYSTEM_RUBYPORTPROXY_HH__
+#define __MEM_RUBY_SYSTEM_RUBYPORTPROXY_HH__
+
+#include "mem/ruby/system/RubyPort.hh"
+#include "params/RubyPortProxy.hh"
+
+class RubyPortProxy : public RubyPort
+{
+
+ public:
+
+ /**
+ * Create a new RubyPortProxy.
+ *
+ * @param p Parameters inherited from the RubyPort
+ */
+ RubyPortProxy(const RubyPortProxyParams* p);
+
+ /**
+ * Destruct a RubyPortProxy.
+ */
+ virtual ~RubyPortProxy();
+
+ /**
+ * Initialise a RubyPortProxy by doing nothing and avoid
+ * involving the super class.
+ */
+ void init();
+
+ /**
+ * Pure virtual member in the super class that we are forced to
+ * implement even if it is never used (since there are only
+ * functional accesses).
+ *
+ * @param pkt The packet to serve to Ruby
+ * @returns always a NULL status
+ */
+ RequestStatus makeRequest(PacketPtr pkt);
+
+ /**
+ * Pure virtual member in the super class that we are forced to
+ * implement even if it is never used (since there are only
+ * functional accesses).
+ *
+ * @returns always 0
+ */
+ int outstandingCount() const { return 0; }
+
+ /**
+ * Pure virtual member in the super class that we are forced to
+ * implement even if it is never used (since there are only
+ * functional accesses).
+ *
+ * @returns always false
+ */
+ bool isDeadlockEventScheduled() const { return false; }
+
+ /**
+ * Pure virtual member in the super class that we are forced to
+ * implement even if it is never used (since there are only
+ * functional accesses).
+ */
+ void descheduleDeadlockEvent() { }
+
+};
+
+#endif // __MEM_RUBY_SYSTEM_RUBYPORTPROXY_HH__
diff --git a/src/mem/ruby/system/SConscript b/src/mem/ruby/system/SConscript
index 66d7d95bb..cbb1da3b1 100644
--- a/src/mem/ruby/system/SConscript
+++ b/src/mem/ruby/system/SConscript
@@ -49,6 +49,7 @@ Source('WireBuffer.cc')
Source('MemoryNode.cc')
Source('PersistentTable.cc')
Source('RubyPort.cc')
+Source('RubyPortProxy.cc')
Source('Sequencer.cc')
Source('System.cc')
Source('TimerTable.cc')
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 3f9ceb34d..1cd54d45c 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -733,3 +733,9 @@ Sequencer::checkCoherence(const Address& addr)
g_system_ptr->checkGlobalCoherenceInvariant(addr);
#endif
}
+
+void
+Sequencer::evictionCallback(const Address& address)
+{
+ ruby_eviction_callback(address);
+}
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh
index 4a6d46c01..e262e32e8 100644
--- a/src/mem/ruby/system/Sequencer.hh
+++ b/src/mem/ruby/system/Sequencer.hh
@@ -117,6 +117,7 @@ class Sequencer : public RubyPort, public Consumer
void markRemoved();
void removeRequest(SequencerRequest* request);
+ void evictionCallback(const Address& address);
private:
void issueRequest(PacketPtr pkt, RubyRequestType type);
@@ -181,4 +182,3 @@ operator<<(std::ostream& out, const Sequencer& obj)
}
#endif // __MEM_RUBY_SYSTEM_SEQUENCER_HH__
-
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py
index 5d56dc000..ddf760f7b 100644
--- a/src/mem/ruby/system/Sequencer.py
+++ b/src/mem/ruby/system/Sequencer.py
@@ -44,6 +44,9 @@ class RubyPort(MemObject):
access_phys_mem = Param.Bool(True,
"should the rubyport atomically update phys_mem")
ruby_system = Param.RubySystem("")
+
+class RubyPortProxy(RubyPort):
+ type = 'RubyPortProxy'
class RubySequencer(RubyPort):
type = 'RubySequencer'
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-28 11:44:44 +0000