diff options
Diffstat (limited to 'src/mem/ruby')
| -rw-r--r-- | src/mem/ruby/system/RubyPort.cc | 15 | ||||
| -rw-r--r-- | src/mem/ruby/system/Sequencer.py | 7 |
2 files changed, 17 insertions, 5 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index ab3e6e3b7..2ef65a13a 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -68,13 +68,24 @@ RubyPort::init() Port * RubyPort::getPort(const std::string &if_name, int idx) { - if (if_name == "port") { - M5Port* cpuPort = new M5Port(csprintf("%s-port%d", name(), idx), + // used by the CPUs to connect the caches to the interconnect, and + // for the x86 case also the interrupt master + if (if_name == "slave") { + M5Port* cpuPort = new M5Port(csprintf("%s-slave%d", name(), idx), this, ruby_system, access_phys_mem); cpu_ports.push_back(cpuPort); return cpuPort; } + // used by the x86 CPUs to connect the interrupt PIO and interrupt slave + // port + if (if_name == "master") { + PioPort* masterPort = new PioPort(csprintf("%s-master%d", name(), idx), + this); + + return masterPort; + } + if (if_name == "pio_port") { // ensure there is only one pio port assert(pio_port == NULL); diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py index ddf760f7b..b1e17e052 100644 --- a/src/mem/ruby/system/Sequencer.py +++ b/src/mem/ruby/system/Sequencer.py @@ -34,11 +34,12 @@ from MemObject import MemObject class RubyPort(MemObject): type = 'RubyPort' abstract = True - port = VectorPort("M5 port") + slave = VectorSlavePort("CPU slave port") + master = VectorMasterPort("CPU master port") version = Param.Int(0, "") - pio_port = Port("Ruby_pio_port") + pio_port = MasterPort("Ruby_pio_port") physmem = Param.PhysicalMemory("") - physMemPort = Port("port to physical memory") + physMemPort = MasterPort("port to physical memory") using_ruby_tester = Param.Bool(False, "") using_network_tester = Param.Bool(False, "") access_phys_mem = Param.Bool(True, |