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-rw-r--r--src/mem/simple_dram.cc3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mem/simple_dram.cc b/src/mem/simple_dram.cc
index bd3a70d25..2bb1cec9d 100644
--- a/src/mem/simple_dram.cc
+++ b/src/mem/simple_dram.cc
@@ -43,6 +43,7 @@
#include "debug/DRAM.hh"
#include "debug/DRAMWR.hh"
#include "mem/simple_dram.hh"
+#include "sim/system.hh"
using namespace std;
@@ -94,7 +95,7 @@ SimpleDRAM::init()
// get the burst size from the connected port as it is currently
// assumed to be equal to the cache line size
- bytesPerCacheLine = port.peerBlockSize();
+ bytesPerCacheLine = _system->cacheLineSize();
// we could deal with plenty options here, but for now do a quick
// sanity check