diff options
Diffstat (limited to 'src/mem/simple_dram.hh')
-rw-r--r-- | src/mem/simple_dram.hh | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mem/simple_dram.hh b/src/mem/simple_dram.hh index 8ecce94b7..7f58843aa 100644 --- a/src/mem/simple_dram.hh +++ b/src/mem/simple_dram.hh @@ -155,11 +155,12 @@ class SimpleDRAM : public AbstractMemory Tick tRASDoneAt; Tick actAllowedAt; + uint32_t rowAccesses; uint32_t bytesAccessed; Bank() : openRow(INVALID_ROW), freeAt(0), tRASDoneAt(0), actAllowedAt(0), - bytesAccessed(0) + rowAccesses(0), bytesAccessed(0) { } }; @@ -508,6 +509,12 @@ class SimpleDRAM : public AbstractMemory Enums::PageManage pageMgmt; /** + * Max column accesses (read and write) per row, before forefully + * closing it. + */ + const uint32_t maxAccessesPerRow; + + /** * Pipeline latency of the controller frontend. The frontend * contribution is added to writes (that complete when they are in * the write buffer) and reads that are serviced the write buffer. |