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-rw-r--r--src/mem/slicc/ast/EnqueueStatementAST.py5
-rw-r--r--src/mem/slicc/ast/ObjDeclAST.py2
-rw-r--r--src/mem/slicc/ast/PeekStatementAST.py2
-rw-r--r--src/mem/slicc/ast/StallAndWaitStatementAST.py2
4 files changed, 7 insertions, 4 deletions
diff --git a/src/mem/slicc/ast/EnqueueStatementAST.py b/src/mem/slicc/ast/EnqueueStatementAST.py
index 930540494..556643e4e 100644
--- a/src/mem/slicc/ast/EnqueueStatementAST.py
+++ b/src/mem/slicc/ast/EnqueueStatementAST.py
@@ -65,9 +65,10 @@ class EnqueueStatementAST(StatementAST):
if self.latexpr != None:
ret_type, rcode = self.latexpr.inline(True)
code("(${{self.queue_name.var.code}}).enqueue(" \
- "out_msg, Cycles($rcode));")
+ "out_msg, clockEdge(), cyclesToTicks(Cycles($rcode)));")
else:
- code("(${{self.queue_name.var.code}}).enqueue(out_msg);")
+ code("(${{self.queue_name.var.code}}).enqueue(out_msg, "\
+ "clockEdge(), cyclesToTicks(Cycles(1)));")
# End scope
self.symtab.popFrame()
diff --git a/src/mem/slicc/ast/ObjDeclAST.py b/src/mem/slicc/ast/ObjDeclAST.py
index 7cea70b32..efc7ef928 100644
--- a/src/mem/slicc/ast/ObjDeclAST.py
+++ b/src/mem/slicc/ast/ObjDeclAST.py
@@ -55,6 +55,8 @@ class ObjDeclAST(DeclAST):
c_code = "m_machineID"
elif self.ident == "clusterID":
c_code = "m_clusterID"
+ elif self.ident == "recycle_latency":
+ c_code = "m_recycle_latency"
else:
c_code = "(*m_%s_ptr)" % (self.ident)
diff --git a/src/mem/slicc/ast/PeekStatementAST.py b/src/mem/slicc/ast/PeekStatementAST.py
index f5ef91daf..00d26e908 100644
--- a/src/mem/slicc/ast/PeekStatementAST.py
+++ b/src/mem/slicc/ast/PeekStatementAST.py
@@ -77,7 +77,7 @@ class PeekStatementAST(StatementAST):
if (m_is_blocking &&
(m_block_map.count(in_msg_ptr->m_$address_field) == 1) &&
(m_block_map[in_msg_ptr->m_$address_field] != &$qcode)) {
- $qcode.delayHead();
+ $qcode.delayHead(clockEdge(), cyclesToTicks(Cycles(1)));
continue;
}
''')
diff --git a/src/mem/slicc/ast/StallAndWaitStatementAST.py b/src/mem/slicc/ast/StallAndWaitStatementAST.py
index b2f622871..6ab2888b7 100644
--- a/src/mem/slicc/ast/StallAndWaitStatementAST.py
+++ b/src/mem/slicc/ast/StallAndWaitStatementAST.py
@@ -45,5 +45,5 @@ class StallAndWaitStatementAST(StatementAST):
address_code = self.address.var.code
code('''
stallBuffer(&($in_port_code), $address_code);
- $in_port_code.stallMessage($address_code);
+ $in_port_code.stallMessage($address_code, clockEdge());
''')