summaryrefslogtreecommitdiff
path: root/src/mem/slicc
diff options
context:
space:
mode:
Diffstat (limited to 'src/mem/slicc')
-rw-r--r--src/mem/slicc/symbols/StateMachine.py6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 009680941..8b7a63f6a 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -285,7 +285,7 @@ class $c_ident : public AbstractController
void recordCacheTrace(int cntrl, CacheRecorder* tr);
Sequencer* getSequencer() const;
- uint32_t functionalWriteBuffers(PacketPtr&);
+ int functionalWriteBuffers(PacketPtr&);
void countTransition(${ident}_State state, ${ident}_Event event);
void possibleTransition(${ident}_State state, ${ident}_Event event);
@@ -989,10 +989,10 @@ $c_ident::${{action.ident}}(const Address& addr)
# Function for functional writes to messages buffered in the controller
code('''
-uint32_t
+int
$c_ident::functionalWriteBuffers(PacketPtr& pkt)
{
- uint32_t num_functional_writes = 0;
+ int num_functional_writes = 0;
''')
for var in self.objects:
vtype = var.type