4 files changed, 81 insertions, 0 deletions

diff --git a/src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py b/src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py
new file mode 100644
index 000000000..cd453bdc3
--- /dev/null
+++ b/src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py
@@ -0,0 +1,43 @@
+# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
+# Copyright (c) 2009 The Hewlett-Packard Development Company
+# Copyright (c) 2010 Advanced Micro Devices, Inc.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+from slicc.ast.StatementAST import StatementAST
+
+class WakeUpAllDependentsStatementAST(StatementAST):
+    def __init__(self, slicc):
+        super(StatementAST, self).__init__(slicc)
+        
+    def __repr__(self):
+        return "[WakeUpAllDependentsStatementAst: %r]" % self.variable
+
+    def generate(self, code, return_type):
+        code('''
+        if (m_waiting_buffers.size() > 0) {
+            wakeUpAllBuffers();
+        }
+        ''')
diff --git a/src/mem/slicc/ast/__init__.py b/src/mem/slicc/ast/__init__.py
index ae797ecd3..4af6c2036 100644
--- a/src/mem/slicc/ast/__init__.py
+++ b/src/mem/slicc/ast/__init__.py
@@ -72,4 +72,5 @@ from slicc.ast.TypeFieldEnumAST import *
 from slicc.ast.TypeFieldMemberAST import *
 from slicc.ast.TypeFieldMethodAST import *
 from slicc.ast.VarExprAST import *
+from slicc.ast.WakeUpAllDependentsStatementAST import *
 from slicc.ast.WakeUpDependentsStatementAST import *
diff --git a/src/mem/slicc/parser.py b/src/mem/slicc/parser.py
index bb958f746..823e08819 100644
--- a/src/mem/slicc/parser.py
+++ b/src/mem/slicc/parser.py
@@ -159,6 +159,7 @@ class SLICC(Grammar):
         'peek' : 'PEEK',
         'stall_and_wait' : 'STALL_AND_WAIT',
         'wake_up_dependents' : 'WAKE_UP_DEPENDENTS',
+        'wake_up_all_dependents' : 'WAKE_UP_ALL_DEPENDENTS',
         'enqueue' : 'ENQUEUE',
         'copy_head' : 'COPY_HEAD',
         'check_allocate' : 'CHECK_ALLOCATE',
@@ -561,6 +562,10 @@ class SLICC(Grammar):
         "statement : WAKE_UP_DEPENDENTS '(' var ')' SEMI"
         p[0] = ast.WakeUpDependentsStatementAST(self, p[3])
 
+    def p_statement__wake_up_all_dependents(self, p):
+        "statement : WAKE_UP_ALL_DEPENDENTS '(' ')' SEMI"
+        p[0] = ast.WakeUpAllDependentsStatementAST(self)
+
     def p_statement__peek(self, p):
         "statement : PEEK '(' var ',' type pairs ')' statements"
         p[0] = ast.PeekStatementAST(self, p[3], p[5], p[6], p[8], "peek")
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index b0d663c43..6a5817d55 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -258,6 +258,7 @@ public:
     const MachineType getMachineType() const;
     void stallBuffer(MessageBuffer* buf, Address addr);
     void wakeUpBuffers(Address addr);
+    void wakeUpAllBuffers();
     void initNetworkPtr(Network* net_ptr) { m_net_ptr = net_ptr; }
     void print(std::ostream& out) const;
     void printConfig(std::ostream& out) const;
@@ -734,6 +735,37 @@ $c_ident::wakeUpBuffers(Address addr)
 }
 
 void
+$c_ident::wakeUpAllBuffers()
+{
+    //
+    // Wake up all possible buffers that could be waiting on any message.
+    //
+
+    std::vector<MsgVecType*> wokeUpMsgVecs;
+    
+    for (WaitingBufType::iterator buf_iter = m_waiting_buffers.begin();
+         buf_iter != m_waiting_buffers.end();
+         ++buf_iter) {
+         for (MsgVecType::iterator vec_iter = buf_iter->second->begin();
+              vec_iter != buf_iter->second->end();
+              ++vec_iter) {
+              if (*vec_iter != NULL) {
+                  (*vec_iter)->reanalyzeAllMessages();
+              }
+         }
+         wokeUpMsgVecs.push_back(buf_iter->second);
+    }
+    
+    for (std::vector<MsgVecType*>::iterator wb_iter = wokeUpMsgVecs.begin();
+         wb_iter != wokeUpMsgVecs.end();
+         ++wb_iter) {
+         delete (*wb_iter);
+    }
+    
+    m_waiting_buffers.clear();
+}
+
+void
 $c_ident::blockOnQueue(Address addr, MessageBuffer* port)
 {
     m_is_blocking = true;