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-rw-r--r--src/mem/slicc/symbols/StateMachine.py17
1 files changed, 0 insertions, 17 deletions
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 6d67f27ba..c96af4a90 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -257,7 +257,6 @@ class $c_ident : public AbstractController
void print(std::ostream& out) const;
void wakeup();
- void printStats(std::ostream& out) const;
void clearStats();
void regStats();
void collateStats();
@@ -847,22 +846,6 @@ $c_ident::print(ostream& out) const
out << "[$c_ident " << m_version << "]";
}
-void
-$c_ident::printStats(ostream& out) const
-{
-''')
- #
- # Cache and Memory Controllers have specific profilers associated with
- # them. Print out these stats before dumping state transition stats.
- #
- for param in self.config_parameters:
- if param.type_ast.type.ident == "DirectoryMemory":
- assert(param.pointer)
- code(' m_${{param.ident}}_ptr->printStats(out);')
-
- code('''
-}
-
void $c_ident::clearStats()
{
for (int state = 0; state < ${ident}_State_NUM; state++) {