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-rw-r--r--src/mem/cache/base.hh2
-rw-r--r--src/mem/cache/cache.cc2
-rw-r--r--src/mem/cache/cache.hh2
-rw-r--r--src/mem/cache/mshr.cc2
-rw-r--r--src/mem/cache/tags/fa_lru.cc2
-rw-r--r--src/mem/cache/write_queue_entry.cc2
-rw-r--r--src/mem/coherent_xbar.cc2
-rw-r--r--src/mem/dramsim2_wrapper.cc2
-rw-r--r--src/mem/mem_checker.hh2
-rw-r--r--src/mem/noncoherent_xbar.cc2
-rw-r--r--src/mem/packet.cc2
-rw-r--r--src/mem/packet.hh2
-rw-r--r--src/mem/request.hh2
-rw-r--r--src/mem/ruby/common/Set.hh2
-rw-r--r--src/mem/ruby/network/MessageBuffer.cc2
-rw-r--r--src/mem/ruby/network/Network.cc2
-rw-r--r--src/mem/ruby/network/fault_model/FaultModel.cc2
-rw-r--r--src/mem/ruby/slicc_interface/AbstractCacheEntry.hh2
-rw-r--r--src/mem/ruby/structures/AbstractReplacementPolicy.cc2
-rw-r--r--src/mem/ruby/system/GPUCoalescer.cc2
-rw-r--r--src/mem/ruby/system/Sequencer.cc2
-rw-r--r--src/mem/ruby/system/VIPERCoalescer.cc2
-rw-r--r--src/mem/slicc/symbols/StateMachine.py4
-rw-r--r--src/mem/slicc/symbols/Type.py4
-rwxr-xr-xsrc/mem/snoop_filter.cc2
-rw-r--r--src/mem/xbar.cc2
26 files changed, 28 insertions, 28 deletions
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 431c2f84a..b006d4b64 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -55,7 +55,7 @@
#include <string>
#include <vector>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/statistics.hh"
#include "base/trace.hh"
#include "base/types.hh"
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 169ef0d1d..2a3dddc19 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -53,7 +53,7 @@
#include "mem/cache/cache.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/types.hh"
#include "debug/Cache.hh"
#include "debug/CachePort.hh"
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 9d135c652..a39a9c740 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -54,7 +54,7 @@
#include <unordered_set>
-#include "base/misc.hh" // fatal, panic, and warn
+#include "base/logging.hh" // fatal, panic, and warn
#include "enums/Clusivity.hh"
#include "mem/cache/base.hh"
#include "mem/cache/blk.hh"
diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc
index 25f73d79a..fa21f5cfc 100644
--- a/src/mem/cache/mshr.cc
+++ b/src/mem/cache/mshr.cc
@@ -54,7 +54,7 @@
#include <string>
#include <vector>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/types.hh"
#include "debug/Cache.hh"
#include "mem/cache/cache.hh"
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 91b1b5679..895f7953b 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -51,7 +51,7 @@
#include <sstream>
#include "base/intmath.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
using namespace std;
diff --git a/src/mem/cache/write_queue_entry.cc b/src/mem/cache/write_queue_entry.cc
index 283c4a862..7a778ea72 100644
--- a/src/mem/cache/write_queue_entry.cc
+++ b/src/mem/cache/write_queue_entry.cc
@@ -55,7 +55,7 @@
#include <string>
#include <vector>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/types.hh"
#include "debug/Cache.hh"
#include "mem/cache/cache.hh"
diff --git a/src/mem/coherent_xbar.cc b/src/mem/coherent_xbar.cc
index ef0620822..ede409503 100644
--- a/src/mem/coherent_xbar.cc
+++ b/src/mem/coherent_xbar.cc
@@ -49,7 +49,7 @@
#include "mem/coherent_xbar.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/trace.hh"
#include "debug/AddrRanges.hh"
#include "debug/CoherentXBar.hh"
diff --git a/src/mem/dramsim2_wrapper.cc b/src/mem/dramsim2_wrapper.cc
index 841ae4391..5b35e7123 100644
--- a/src/mem/dramsim2_wrapper.cc
+++ b/src/mem/dramsim2_wrapper.cc
@@ -54,7 +54,7 @@
#include "DRAMSim2/MultiChannelMemorySystem.h"
#include "base/compiler.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
/**
* DRAMSim2 requires SHOW_SIM_OUTPUT to be defined (declared extern in
diff --git a/src/mem/mem_checker.hh b/src/mem/mem_checker.hh
index 7de4c17b7..eacfda04d 100644
--- a/src/mem/mem_checker.hh
+++ b/src/mem/mem_checker.hh
@@ -47,7 +47,7 @@
#include <unordered_map>
#include <vector>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "debug/MemChecker.hh"
diff --git a/src/mem/noncoherent_xbar.cc b/src/mem/noncoherent_xbar.cc
index eeaa4fb0b..94649eaff 100644
--- a/src/mem/noncoherent_xbar.cc
+++ b/src/mem/noncoherent_xbar.cc
@@ -49,7 +49,7 @@
#include "mem/noncoherent_xbar.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/trace.hh"
#include "debug/NoncoherentXBar.hh"
#include "debug/XBar.hh"
diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index 371058b25..e05783ca9 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -54,7 +54,7 @@
#include <iostream>
#include "base/cprintf.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/trace.hh"
using namespace std;
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 74a2de135..0920f223b 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -59,7 +59,7 @@
#include "base/cast.hh"
#include "base/compiler.hh"
#include "base/flags.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/printable.hh"
#include "base/types.hh"
#include "mem/request.hh"
diff --git a/src/mem/request.hh b/src/mem/request.hh
index d9f58d21d..aff13075b 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -56,7 +56,7 @@
#include <climits>
#include "base/flags.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/types.hh"
#include "cpu/inst_seq.hh"
#include "sim/core.hh"
diff --git a/src/mem/ruby/common/Set.hh b/src/mem/ruby/common/Set.hh
index 3ab6979d4..cb01c9613 100644
--- a/src/mem/ruby/common/Set.hh
+++ b/src/mem/ruby/common/Set.hh
@@ -36,7 +36,7 @@
#include <cassert>
#include <iostream>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "mem/ruby/common/TypeDefines.hh"
// Change for systems with more than 64 controllers of a particular type.
diff --git a/src/mem/ruby/network/MessageBuffer.cc b/src/mem/ruby/network/MessageBuffer.cc
index 67bc7f72d..f4eca3b1e 100644
--- a/src/mem/ruby/network/MessageBuffer.cc
+++ b/src/mem/ruby/network/MessageBuffer.cc
@@ -31,7 +31,7 @@
#include <cassert>
#include "base/cprintf.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/random.hh"
#include "base/stl_helpers.hh"
#include "debug/RubyQueue.hh"
diff --git a/src/mem/ruby/network/Network.cc b/src/mem/ruby/network/Network.cc
index 1761218b0..57834f2e2 100644
--- a/src/mem/ruby/network/Network.cc
+++ b/src/mem/ruby/network/Network.cc
@@ -40,7 +40,7 @@
#include "mem/ruby/network/Network.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "mem/ruby/common/MachineID.hh"
#include "mem/ruby/network/BasicLink.hh"
#include "mem/ruby/system/RubySystem.hh"
diff --git a/src/mem/ruby/network/fault_model/FaultModel.cc b/src/mem/ruby/network/fault_model/FaultModel.cc
index 7be5bcd49..befcfa265 100644
--- a/src/mem/ruby/network/fault_model/FaultModel.cc
+++ b/src/mem/ruby/network/fault_model/FaultModel.cc
@@ -45,7 +45,7 @@
// GEM5 includes
#include "FaultModel.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
using namespace std;
diff --git a/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh b/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh
index cbd068c04..f0e950030 100644
--- a/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh
+++ b/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh
@@ -35,7 +35,7 @@
#include <iostream>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "mem/protocol/AccessPermission.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/slicc_interface/AbstractEntry.hh"
diff --git a/src/mem/ruby/structures/AbstractReplacementPolicy.cc b/src/mem/ruby/structures/AbstractReplacementPolicy.cc
index 05304dc84..01eb6e517 100644
--- a/src/mem/ruby/structures/AbstractReplacementPolicy.cc
+++ b/src/mem/ruby/structures/AbstractReplacementPolicy.cc
@@ -30,7 +30,7 @@
#include "mem/ruby/structures/AbstractReplacementPolicy.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
AbstractReplacementPolicy::AbstractReplacementPolicy(const Params * p)
: SimObject(p)
diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc
index a615c40fd..d874b84e5 100644
--- a/src/mem/ruby/system/GPUCoalescer.cc
+++ b/src/mem/ruby/system/GPUCoalescer.cc
@@ -33,7 +33,7 @@
* Author: Sooraj Puthoor
*/
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 541b52138..4037fb8f1 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -29,7 +29,7 @@
#include "mem/ruby/system/Sequencer.hh"
#include "arch/x86/ldstflags.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/str.hh"
#include "cpu/testers/rubytest/RubyTester.hh"
#include "debug/MemoryAccess.hh"
diff --git a/src/mem/ruby/system/VIPERCoalescer.cc b/src/mem/ruby/system/VIPERCoalescer.cc
index 6956469d5..04484bc97 100644
--- a/src/mem/ruby/system/VIPERCoalescer.cc
+++ b/src/mem/ruby/system/VIPERCoalescer.cc
@@ -33,7 +33,7 @@
* Author: Sooraj Puthoor
*/
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 817ddb481..3f4e43a8b 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -1051,7 +1051,7 @@ $c_ident::functionalWriteBuffers(PacketPtr& pkt)
#include <cassert>
#include <typeinfo>
-#include "base/misc.hh"
+#include "base/logging.hh"
''')
for f in self.debug_flags:
@@ -1168,7 +1168,7 @@ ${ident}_Controller::wakeup()
#include <cassert>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/trace.hh"
#include "debug/ProtocolTrace.hh"
#include "debug/RubyGenerated.hh"
diff --git a/src/mem/slicc/symbols/Type.py b/src/mem/slicc/symbols/Type.py
index e62758305..4f4f0585d 100644
--- a/src/mem/slicc/symbols/Type.py
+++ b/src/mem/slicc/symbols/Type.py
@@ -460,7 +460,7 @@ out << "${{dm.ident}} = " << printAddress(m_${{dm.ident}}) << " ";''')
if self.isMachineType:
code('#include <functional>')
- code('#include "base/misc.hh"')
+ code('#include "base/logging.hh"')
code('#include "mem/ruby/common/Address.hh"')
code('#include "mem/ruby/common/TypeDefines.hh"')
code('struct MachineID;')
@@ -561,7 +561,7 @@ std::ostream& operator<<(std::ostream& out, const ${{self.c_ident}}& obj);
#include <iostream>
#include <string>
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "mem/protocol/${{self.c_ident}}.hh"
using namespace std;
diff --git a/src/mem/snoop_filter.cc b/src/mem/snoop_filter.cc
index e8f449504..b372cfe21 100755
--- a/src/mem/snoop_filter.cc
+++ b/src/mem/snoop_filter.cc
@@ -44,7 +44,7 @@
#include "mem/snoop_filter.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/trace.hh"
#include "debug/SnoopFilter.hh"
#include "sim/system.hh"
diff --git a/src/mem/xbar.cc b/src/mem/xbar.cc
index b7826fd25..db0bf180e 100644
--- a/src/mem/xbar.cc
+++ b/src/mem/xbar.cc
@@ -49,7 +49,7 @@
#include "mem/xbar.hh"
-#include "base/misc.hh"
+#include "base/logging.hh"
#include "base/trace.hh"
#include "debug/AddrRanges.hh"
#include "debug/Drain.hh"