diff options
Diffstat (limited to 'src/mem')
| -rw-r--r-- | src/mem/cache/prefetch/queued.cc | 3 | ||||
| -rw-r--r-- | src/mem/request.hh | 44 |
2 files changed, 30 insertions, 17 deletions
diff --git a/src/mem/cache/prefetch/queued.cc b/src/mem/cache/prefetch/queued.cc index 4bc75acd6..03ca3188f 100644 --- a/src/mem/cache/prefetch/queued.cc +++ b/src/mem/cache/prefetch/queued.cc @@ -122,7 +122,8 @@ QueuedPrefetcher::notify(const PacketPtr &pkt) pf_pkt->allocate(); if (pkt->req->hasContextId()) { - pf_req->setContext(pkt->req->contextId()); + pf_req->setThreadContext(pkt->req->contextId(), + pkt->req->threadId()); } if (tagPrefetch && pkt->req->hasPC()) { diff --git a/src/mem/request.hh b/src/mem/request.hh index 90363ea66..0d2750a16 100644 --- a/src/mem/request.hh +++ b/src/mem/request.hh @@ -257,13 +257,14 @@ class Request VALID_PC = 0x00000010, /** Whether or not the context ID is valid. */ VALID_CONTEXT_ID = 0x00000020, + VALID_THREAD_ID = 0x00000040, /** Whether or not the sc result is valid. */ VALID_EXTRA_DATA = 0x00000080, /** * These flags are *not* cleared when a Request object is reused * (assigned a new address). */ - STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID + STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID | VALID_THREAD_ID }; private: @@ -338,8 +339,10 @@ class Request * store conditional or the compare value for a CAS. */ uint64_t _extraData; - /** The context ID (for statistics, locks, and wakeups). */ + /** The context ID (for statistics, typically). */ ContextID _contextId; + /** The thread ID (id within this CPU) */ + ThreadID _threadId; /** program counter of initiating access; for tracing/debugging */ Addr _pc; @@ -360,21 +363,21 @@ class Request Request() : _paddr(0), _size(0), _masterId(invldMasterId), _time(0), _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0), - _extraData(0), _contextId(0), _pc(0), + _extraData(0), _contextId(0), _threadId(0), _pc(0), _reqInstSeqNum(0), atomicOpFunctor(nullptr), translateDelta(0), accessDelta(0), depth(0) {} Request(Addr paddr, unsigned size, Flags flags, MasterID mid, - InstSeqNum seq_num, ContextID cid) + InstSeqNum seq_num, ContextID cid, ThreadID tid) : _paddr(0), _size(0), _masterId(invldMasterId), _time(0), _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0), - _extraData(0), _contextId(0), _pc(0), + _extraData(0), _contextId(0), _threadId(0), _pc(0), _reqInstSeqNum(seq_num), atomicOpFunctor(nullptr), translateDelta(0), accessDelta(0), depth(0) { setPhys(paddr, size, flags, mid, curTick()); - setContext(cid); + setThreadContext(cid, tid); privateFlags.set(VALID_INST_SEQ_NUM); } @@ -386,7 +389,7 @@ class Request Request(Addr paddr, unsigned size, Flags flags, MasterID mid) : _paddr(0), _size(0), _masterId(invldMasterId), _time(0), _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0), - _extraData(0), _contextId(0), _pc(0), + _extraData(0), _contextId(0), _threadId(0), _pc(0), _reqInstSeqNum(0), atomicOpFunctor(nullptr), translateDelta(0), accessDelta(0), depth(0) { @@ -396,7 +399,7 @@ class Request Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time) : _paddr(0), _size(0), _masterId(invldMasterId), _time(0), _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0), - _extraData(0), _contextId(0), _pc(0), + _extraData(0), _contextId(0), _threadId(0), _pc(0), _reqInstSeqNum(0), atomicOpFunctor(nullptr), translateDelta(0), accessDelta(0), depth(0) { @@ -407,7 +410,7 @@ class Request Addr pc) : _paddr(0), _size(0), _masterId(invldMasterId), _time(0), _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0), - _extraData(0), _contextId(0), _pc(pc), + _extraData(0), _contextId(0), _threadId(0), _pc(pc), _reqInstSeqNum(0), atomicOpFunctor(nullptr), translateDelta(0), accessDelta(0), depth(0) { @@ -416,15 +419,15 @@ class Request } Request(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid, - Addr pc, ContextID cid) + Addr pc, ContextID cid, ThreadID tid) : _paddr(0), _size(0), _masterId(invldMasterId), _time(0), _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0), - _extraData(0), _contextId(0), _pc(0), + _extraData(0), _contextId(0), _threadId(0), _pc(0), _reqInstSeqNum(0), atomicOpFunctor(nullptr), translateDelta(0), accessDelta(0), depth(0) { setVirt(asid, vaddr, size, flags, mid, pc); - setContext(cid); + setThreadContext(cid, tid); } Request(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc, @@ -432,7 +435,7 @@ class Request : atomicOpFunctor(atomic_op) { setVirt(asid, vaddr, size, flags, mid, pc); - setContext(cid); + setThreadContext(cid, tid); } ~Request() @@ -443,13 +446,14 @@ class Request } /** - * Set up Context numbers. + * Set up CPU and thread numbers. */ void - setContext(ContextID context_id) + setThreadContext(ContextID context_id, ThreadID tid) { _contextId = context_id; - privateFlags.set(VALID_CONTEXT_ID); + _threadId = tid; + privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID); } /** @@ -697,6 +701,14 @@ class Request return _contextId; } + /** Accessor function for thread ID. */ + ThreadID + threadId() const + { + assert(privateFlags.isSet(VALID_THREAD_ID)); + return _threadId; + } + void setPC(Addr pc) { |