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-rw-r--r--src/mem/page_table.cc23
-rw-r--r--src/mem/page_table.hh15
-rw-r--r--src/mem/translating_port.cc8
3 files changed, 23 insertions, 23 deletions
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index 745872319..7622c2d48 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -45,16 +45,14 @@
#include "debug/MMU.hh"
#include "mem/page_table.hh"
#include "sim/faults.hh"
-#include "sim/process.hh"
#include "sim/sim_object.hh"
-#include "sim/system.hh"
using namespace std;
using namespace TheISA;
-PageTable::PageTable(Process *_process, Addr _pageSize)
+PageTable::PageTable(const std::string &__name, uint64_t _pid, Addr _pageSize)
: pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
- process(_process)
+ pid(_pid), _name(__name)
{
assert(isPowerOf2(pageSize));
pTableCache[0].vaddr = 0;
@@ -67,21 +65,20 @@ PageTable::~PageTable()
}
void
-PageTable::allocate(Addr vaddr, int64_t size, bool clobber)
+PageTable::map(Addr vaddr, Addr paddr, int64_t size, bool clobber)
{
// starting address must be page aligned
assert(pageOffset(vaddr) == 0);
DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
- for (; size > 0; size -= pageSize, vaddr += pageSize) {
+ for (; size > 0; size -= pageSize, vaddr += pageSize, paddr += pageSize) {
if (!clobber && (pTable.find(vaddr) != pTable.end())) {
// already mapped
fatal("PageTable::allocate: address 0x%x already mapped", vaddr);
}
- pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
- process->system->new_page());
+ pTable[vaddr] = TheISA::TlbEntry(pid, vaddr, paddr);
updateCache(vaddr, pTable[vaddr]);
}
}
@@ -108,11 +105,11 @@ PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
}
void
-PageTable::deallocate(Addr vaddr, int64_t size)
+PageTable::unmap(Addr vaddr, int64_t size)
{
assert(pageOffset(vaddr) == 0);
- DPRINTF(MMU, "Deallocating page: %#x-%#x\n", vaddr, vaddr+ size);
+ DPRINTF(MMU, "Unmapping page: %#x-%#x\n", vaddr, vaddr+ size);
for (; size > 0; size -= pageSize, vaddr += pageSize) {
PTableItr iter = pTable.find(vaddr);
@@ -208,7 +205,7 @@ PageTable::serialize(std::ostream &os)
PTableItr iter = pTable.begin();
PTableItr end = pTable.end();
while (iter != end) {
- os << "\n[" << csprintf("%s.Entry%d", process->name(), count) << "]\n";
+ os << "\n[" << csprintf("%s.Entry%d", name(), count) << "]\n";
paramOut(os, "vaddr", iter->first);
iter->second.serialize(os);
@@ -230,9 +227,9 @@ PageTable::unserialize(Checkpoint *cp, const std::string &section)
pTable.clear();
while(i < count) {
- paramIn(cp, csprintf("%s.Entry%d", process->name(), i), "vaddr", vaddr);
+ paramIn(cp, csprintf("%s.Entry%d", name(), i), "vaddr", vaddr);
entry = new TheISA::TlbEntry();
- entry->unserialize(cp, csprintf("%s.Entry%d", process->name(), i));
+ entry->unserialize(cp, csprintf("%s.Entry%d", name(), i));
pTable[vaddr] = *entry;
++i;
}
diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index d60f4a433..b1b5227be 100644
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -46,8 +46,6 @@
#include "mem/request.hh"
#include "sim/serialize.hh"
-class Process;
-
/**
* Page Table Declaration.
*/
@@ -68,20 +66,25 @@ class PageTable
const Addr pageSize;
const Addr offsetMask;
- Process *process;
+ const uint64_t pid;
+ const std::string _name;
public:
- PageTable(Process *_process, Addr _pageSize = TheISA::VMPageSize);
+ PageTable(const std::string &__name, uint64_t _pid,
+ Addr _pageSize = TheISA::VMPageSize);
~PageTable();
+ // for DPRINTF compatibility
+ const std::string name() const { return _name; }
+
Addr pageAlign(Addr a) { return (a & ~offsetMask); }
Addr pageOffset(Addr a) { return (a & offsetMask); }
- void allocate(Addr vaddr, int64_t size, bool clobber = false);
+ void map(Addr vaddr, Addr paddr, int64_t size, bool clobber = false);
void remap(Addr vaddr, int64_t size, Addr new_vaddr);
- void deallocate(Addr vaddr, int64_t size);
+ void unmap(Addr vaddr, int64_t size);
/**
* Check if any pages in a region are already allocated
diff --git a/src/mem/translating_port.cc b/src/mem/translating_port.cc
index 80c68c6bd..3ea728349 100644
--- a/src/mem/translating_port.cc
+++ b/src/mem/translating_port.cc
@@ -86,8 +86,8 @@ TranslatingPort::tryWriteBlob(Addr addr, uint8_t *p, int size)
if (!pTable->translate(gen.addr(), paddr)) {
if (allocating == Always) {
- pTable->allocate(roundDown(gen.addr(), VMPageSize),
- VMPageSize);
+ process->allocateMem(roundDown(gen.addr(), VMPageSize),
+ VMPageSize);
} else if (allocating == NextPage) {
// check if we've accessed the next page on the stack
if (!process->fixupStackFault(gen.addr()))
@@ -123,8 +123,8 @@ TranslatingPort::tryMemsetBlob(Addr addr, uint8_t val, int size)
if (!pTable->translate(gen.addr(), paddr)) {
if (allocating == Always) {
- pTable->allocate(roundDown(gen.addr(), VMPageSize),
- VMPageSize);
+ process->allocateMem(roundDown(gen.addr(), VMPageSize),
+ VMPageSize);
pTable->translate(gen.addr(), paddr);
} else {
return false;