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-rw-r--r--src/mem/cache/cache_blk.hh2
-rw-r--r--src/mem/cache/miss/mshr.cc2
-rw-r--r--src/mem/cache/tags/iic.cc2
-rw-r--r--src/mem/cache/tags/lru.cc2
-rw-r--r--src/mem/cache/tags/split_lifo.cc2
-rw-r--r--src/mem/cache/tags/split_lru.cc2
-rw-r--r--src/mem/packet.hh2
-rw-r--r--src/mem/packet_access.hh25
-rw-r--r--src/mem/page_table.cc2
-rw-r--r--src/mem/request.hh2
10 files changed, 9 insertions, 34 deletions
diff --git a/src/mem/cache/cache_blk.hh b/src/mem/cache/cache_blk.hh
index a4df1b03f..fa00a0f5a 100644
--- a/src/mem/cache/cache_blk.hh
+++ b/src/mem/cache/cache_blk.hh
@@ -37,7 +37,7 @@
#include <list>
-#include "sim/root.hh" // for Tick
+#include "sim/core.hh" // for Tick
#include "arch/isa_traits.hh" // for Addr
#include "mem/request.hh"
diff --git a/src/mem/cache/miss/mshr.cc b/src/mem/cache/miss/mshr.cc
index 352d1ec6f..74dad658b 100644
--- a/src/mem/cache/miss/mshr.cc
+++ b/src/mem/cache/miss/mshr.cc
@@ -39,7 +39,7 @@
#include <vector>
#include "mem/cache/miss/mshr.hh"
-#include "sim/root.hh" // for curTick
+#include "sim/core.hh" // for curTick
#include "sim/host.hh"
#include "base/misc.hh"
#include "mem/cache/cache.hh"
diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc
index 20e2ef0ac..9c802d0dc 100644
--- a/src/mem/cache/tags/iic.cc
+++ b/src/mem/cache/tags/iic.cc
@@ -42,7 +42,7 @@
#include "mem/cache/base_cache.hh"
#include "mem/cache/tags/iic.hh"
#include "base/intmath.hh"
-#include "sim/root.hh" // for curTick
+#include "sim/core.hh" // for curTick
#include "base/trace.hh" // for DPRINTF
diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc
index 102bb3506..8e8779774 100644
--- a/src/mem/cache/tags/lru.cc
+++ b/src/mem/cache/tags/lru.cc
@@ -38,7 +38,7 @@
#include "mem/cache/base_cache.hh"
#include "base/intmath.hh"
#include "mem/cache/tags/lru.hh"
-#include "sim/root.hh"
+#include "sim/core.hh"
using namespace std;
diff --git a/src/mem/cache/tags/split_lifo.cc b/src/mem/cache/tags/split_lifo.cc
index 792ff8fa7..d71d1a3ef 100644
--- a/src/mem/cache/tags/split_lifo.cc
+++ b/src/mem/cache/tags/split_lifo.cc
@@ -38,7 +38,7 @@
#include "mem/cache/base_cache.hh"
#include "base/intmath.hh"
#include "mem/cache/tags/split_lifo.hh"
-#include "sim/root.hh"
+#include "sim/core.hh"
#include "base/trace.hh"
using namespace std;
diff --git a/src/mem/cache/tags/split_lru.cc b/src/mem/cache/tags/split_lru.cc
index c37d72cb7..7227fb5c1 100644
--- a/src/mem/cache/tags/split_lru.cc
+++ b/src/mem/cache/tags/split_lru.cc
@@ -38,7 +38,7 @@
#include "mem/cache/base_cache.hh"
#include "base/intmath.hh"
#include "mem/cache/tags/split_lru.hh"
-#include "sim/root.hh"
+#include "sim/core.hh"
using namespace std;
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 16410594a..dc23e9f6d 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -46,7 +46,7 @@
#include "base/misc.hh"
#include "mem/request.hh"
#include "sim/host.hh"
-#include "sim/root.hh"
+#include "sim/core.hh"
struct Packet;
diff --git a/src/mem/packet_access.hh b/src/mem/packet_access.hh
index 552b6dd27..d1edd00aa 100644
--- a/src/mem/packet_access.hh
+++ b/src/mem/packet_access.hh
@@ -41,31 +41,6 @@
// these functions and make the users do their own byte swapping since
// the memory system does not in fact have an endianness.
-template<>
-inline Twin64_t
-Packet::get()
-{
- Twin64_t d;
- assert(staticData || dynamicData);
- assert(sizeof(Twin64_t) <= size);
- d.a = TheISA::gtoh(*(uint64_t*)data);
- d.b = TheISA::gtoh(*((uint64_t*)data + 1));
- return d;
-}
-
-template<>
-inline Twin32_t
-Packet::get()
-{
- Twin32_t d;
- assert(staticData || dynamicData);
- assert(sizeof(Twin32_t) <= size);
- d.a = TheISA::gtoh(*(uint32_t*)data);
- d.b = TheISA::gtoh(*((uint32_t*)data + 1));
- return d;
-}
-
-
/** return the value of what is pointed to in the packet. */
template <typename T>
inline T
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index fe8094b88..96bc23793 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -157,7 +157,7 @@ PageTable::translate(RequestPtr &req)
assert(pageAlign(req->getVaddr() + req->getSize() - 1)
== pageAlign(req->getVaddr()));
if (!translate(req->getVaddr(), paddr)) {
- return genPageTableFault(req->getVaddr());
+ return Fault(new PageTableFault(req->getVaddr()));
}
req->setPaddr(paddr);
return page_check(req->getPaddr(), req->getSize());
diff --git a/src/mem/request.hh b/src/mem/request.hh
index 43d8ff1d5..d2ebc91d3 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -40,7 +40,7 @@
#define __MEM_REQUEST_HH__
#include "sim/host.hh"
-#include "sim/root.hh"
+#include "sim/core.hh"
#include <cassert>