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-rw-r--r--src/mem/packet.hh11
-rw-r--r--src/mem/port.hh8
-rw-r--r--src/mem/port_impl.hh53
-rw-r--r--src/mem/request.hh9
-rw-r--r--src/mem/vport.cc8
-rw-r--r--src/mem/vport.hh19
6 files changed, 95 insertions, 13 deletions
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index d5a10d29a..403039d96 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -179,6 +179,7 @@ class Packet
{
Success,
BadAddress,
+ Nacked,
Unknown
};
@@ -249,6 +250,16 @@ class Packet
srcValid = false;
}
+ /** Take a request packet that has been returned as NACKED and modify it so
+ * that it can be sent out again. Only packets that need a response can be
+ * NACKED, so verify that that is true. */
+ void reinitNacked() {
+ assert(needsResponse() && result == Nacked);
+ dest = Broadcast;
+ result = Unknown;
+ }
+
+
/** Set the data pointer to the following value that should not be freed. */
template <typename T>
void dataStatic(T *p);
diff --git a/src/mem/port.hh b/src/mem/port.hh
index b89c7dbd3..2edad095e 100644
--- a/src/mem/port.hh
+++ b/src/mem/port.hh
@@ -249,6 +249,14 @@ class FunctionalPort : public Port
virtual void recvFunctional(Packet *pkt) { panic("FuncPort is UniDir"); }
virtual void recvStatusChange(Status status) {}
+ /** a write function that also does an endian conversion. */
+ template <typename T>
+ inline void writeHtoG(Addr addr, T d);
+
+ /** a read function that also does an endian conversion. */
+ template <typename T>
+ inline T readGtoH(Addr addr);
+
template <typename T>
inline void write(Addr addr, T d)
{
diff --git a/src/mem/port_impl.hh b/src/mem/port_impl.hh
new file mode 100644
index 000000000..e9a159293
--- /dev/null
+++ b/src/mem/port_impl.hh
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+#include "arch/isa_specific.hh"
+#include "arch/isa_traits.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
+
+template <typename T>
+void
+FunctionalPort::writeHtoG(Addr addr, T d)
+{
+ d = TheISA::htog(d);
+ writeBlob(addr, (uint8_t*)&d, sizeof(T));
+}
+
+
+template <typename T>
+T
+FunctionalPort::readGtoH(Addr addr)
+{
+ T d;
+ readBlob(addr, (uint8_t*)&d, sizeof(T));
+ return TheISA::gtoh(d);
+}
+
diff --git a/src/mem/request.hh b/src/mem/request.hh
index c7a1b31fb..af1d6d8a8 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -128,6 +128,13 @@ class Request
: validCpuAndThreadNums(false)
{ setPhys(_paddr, _size, _flags); }
+ Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
+ int _cpuNum, int _threadNum)
+ {
+ setThreadContext(_cpuNum, _threadNum);
+ setVirt(_asid, _vaddr, _size, _flags, _pc);
+ }
+
/**
* Set up CPU and thread numbers. */
void setThreadContext(int _cpuNum, int _threadNum)
@@ -201,6 +208,8 @@ class Request
/** Accessor function for asid.*/
int getAsid() { assert(validAsidVaddr); return asid; }
+ /** Accessor function to check if sc result is valid. */
+ bool scResultValid() { return validScResult; }
/** Accessor function for store conditional return value.*/
uint64_t getScResult() { assert(validScResult); return scResult; }
/** Accessor function for store conditional return value.*/
diff --git a/src/mem/vport.cc b/src/mem/vport.cc
index 0d53e4609..cd297bb8e 100644
--- a/src/mem/vport.cc
+++ b/src/mem/vport.cc
@@ -42,8 +42,8 @@ VirtualPort::readBlob(Addr addr, uint8_t *p, int size)
for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
gen.next())
{
- if (xc)
- paddr = TheISA::vtophys(xc,gen.addr());
+ if (tc)
+ paddr = TheISA::vtophys(tc,gen.addr());
else
paddr = TheISA::vtophys(gen.addr());
@@ -59,8 +59,8 @@ VirtualPort::writeBlob(Addr addr, uint8_t *p, int size)
for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
gen.next())
{
- if (xc)
- paddr = TheISA::vtophys(xc,gen.addr());
+ if (tc)
+ paddr = TheISA::vtophys(tc,gen.addr());
else
paddr = TheISA::vtophys(gen.addr());
diff --git a/src/mem/vport.hh b/src/mem/vport.hh
index 43f6e0db2..697c8e5f3 100644
--- a/src/mem/vport.hh
+++ b/src/mem/vport.hh
@@ -38,13 +38,13 @@
#ifndef __MEM_VPORT_HH__
#define __MEM_VPORT_HH__
-#include "mem/port.hh"
+#include "mem/port_impl.hh"
#include "config/full_system.hh"
#include "arch/vtophys.hh"
/** A class that translates a virtual address to a physical address and then
- * calls the above read/write functions. If an execution context is provided the
+ * calls the above read/write functions. If a thread context is provided the
* address can alway be translated, If not it can only be translated if it is a
* simple address masking operation (such as alpha super page accesses).
*/
@@ -52,18 +52,19 @@
class VirtualPort : public FunctionalPort
{
private:
- ExecContext *xc;
+ ThreadContext *tc;
public:
- VirtualPort(const std::string &_name, ExecContext *_xc = NULL)
- : FunctionalPort(_name), xc(_xc)
+ VirtualPort(const std::string &_name, ThreadContext *_tc = NULL)
+ : FunctionalPort(_name), tc(_tc)
{}
- /** Return true if we have an exec context. This is used to prevent someone
- * from accidently deleting the cpus statically allocated vport.
- * @return true if an execution context isn't valid
+ /** Return true if we have an thread context. This is used to
+ * prevent someone from accidently deleting the cpus statically
+ * allocated vport.
+ * @return true if a thread context isn't valid
*/
- bool nullExecContext() { return xc != NULL; }
+ bool nullThreadContext() { return tc != NULL; }
/** Version of readblob that translates virt->phys and deals
* with page boundries. */
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-24 19:41:35 +0000